Searched refs:PUP_DQS_WR (Results 1 – 3 of 3) sorted by relevance
703 mode_config[DQS_WR_MODE] = PUP_DQS_WR; in ddr3_save_training()838 } else if (reg == PUP_DQS_WR) { in ddr3_read_training_results()
152 #define PUP_DQS_WR 0x1 macro
318 adll_addr = ((is_tx == 1) ? PUP_DQS_WR : PUP_DQS_RD); in ddr3_find_adll_limits()1312 ddr3_write_pup_reg(PUP_DQS_WR, cs, pup_num, 0, in ddr3_set_dqs_centralization_results()