| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetCallingConv.h | 151 unsigned PartOffset; member
156 : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) { in InputArg()
189 unsigned PartOffset; member
195 PartOffset(partOffs) { in OutputArg()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetCallingConv.h | 159 unsigned PartOffset; member
164 : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) { in InputArg()
197 unsigned PartOffset; member
203 PartOffset(partOffs) { in OutputArg()
|
| /external/llvm/lib/Transforms/Scalar/ |
| D | SROA.cpp | 3562 uint64_t PartOffset = 0, PartSize = Offsets.Splits.front(); in presplitLoadsAndStores() local
3569 APInt(DL.getPointerSizeInBits(), PartOffset), in presplitLoadsAndStores()
3571 getAdjustedAlignment(LI, PartOffset, DL), /*IsVolatile*/ false, in presplitLoadsAndStores()
3580 Slice(BaseOffset + PartOffset, BaseOffset + PartOffset + PartSize, in presplitLoadsAndStores()
3592 PartOffset = Offsets.Splits[Idx]; in presplitLoadsAndStores()
3594 PartSize = (Idx < Size ? Offsets.Splits[Idx] : LoadSize) - PartOffset; in presplitLoadsAndStores()
3616 uint64_t PartOffset = Idx == 0 ? 0 : Offsets.Splits[Idx - 1]; in presplitLoadsAndStores() local
3622 APInt(DL.getPointerSizeInBits(), PartOffset), in presplitLoadsAndStores()
3624 getAdjustedAlignment(SI, PartOffset, DL), /*IsVolatile*/ false); in presplitLoadsAndStores()
3626 DEBUG(dbgs() << " +" << PartOffset << ":" << *PStore << "\n"); in presplitLoadsAndStores()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | SROA.cpp | 3763 uint64_t PartOffset = 0, PartSize = Offsets.Splits.front(); in presplitLoadsAndStores() local
3771 APInt(DL.getIndexSizeInBits(AS), PartOffset), in presplitLoadsAndStores()
3773 getAdjustedAlignment(LI, PartOffset, DL), /*IsVolatile*/ false, in presplitLoadsAndStores()
3783 Slice(BaseOffset + PartOffset, BaseOffset + PartOffset + PartSize, in presplitLoadsAndStores()
3795 PartOffset = Offsets.Splits[Idx]; in presplitLoadsAndStores()
3797 PartSize = (Idx < Size ? Offsets.Splits[Idx] : LoadSize) - PartOffset; in presplitLoadsAndStores()
3820 uint64_t PartOffset = Idx == 0 ? 0 : Offsets.Splits[Idx - 1]; in presplitLoadsAndStores() local
3828 APInt(DL.getIndexSizeInBits(AS), PartOffset), in presplitLoadsAndStores()
3830 getAdjustedAlignment(SI, PartOffset, DL), /*IsVolatile*/ false); in presplitLoadsAndStores()
3832 LLVM_DEBUG(dbgs() << " +" << PartOffset << ":" << *PStore << "\n"); in presplitLoadsAndStores()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 1016 assert(Ins[i].PartOffset == 0); in LowerFormalArguments()
1019 unsigned PartOffset = Ins[i + 1].PartOffset; in LowerFormalArguments() local
1021 DAG.getIntPtrConstant(PartOffset, DL)); in LowerFormalArguments()
1301 assert(Outs[i].PartOffset == 0); in LowerCall()
1304 unsigned PartOffset = Outs[i + 1].PartOffset; in LowerCall() local
1306 DAG.getIntPtrConstant(PartOffset, DL)); in LowerCall()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1632 unsigned PartOffset = VA.getLocMemOffset(); in LowerFormalArguments() local
1633 unsigned Alignment = MinAlign(VT.getStoreSize(), PartOffset); in LowerFormalArguments()
1635 MachinePointerInfo PtrInfo(UndefValue::get(PtrTy), PartOffset - ValBase); in LowerFormalArguments()
1638 DAG.getConstant(PartOffset, DL, MVT::i32), DAG.getUNDEF(MVT::i32), in LowerFormalArguments()
|
| D | AMDGPUISelLowering.cpp | 1001 unsigned PartOffset = 0; in analyzeFormalArgumentsCompute() local
1004 BasePartOffset + PartOffset, in analyzeFormalArgumentsCompute()
1007 PartOffset += MemVT.getStoreSize(); in analyzeFormalArgumentsCompute()
|
| D | SIISelLowering.cpp | 2065 NewOut.PartOffset += NewOut.VT.getStoreSize(); in LowerReturn()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 954 assert (Ins[I].PartOffset == 0); in LowerFormalArguments()
957 unsigned PartOffset = Ins[I + 1].PartOffset; in LowerFormalArguments() local
959 DAG.getIntPtrConstant(PartOffset, DL)); in LowerFormalArguments()
1090 assert (Outs[I].PartOffset == 0); in LowerCall()
1093 unsigned PartOffset = Outs[I + 1].PartOffset; in LowerCall() local
1095 DAG.getIntPtrConstant(PartOffset, DL)); in LowerCall()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 1176 assert (Ins[I].PartOffset == 0); in LowerFormalArguments()
1179 unsigned PartOffset = Ins[I + 1].PartOffset; in LowerFormalArguments() local
1181 DAG.getIntPtrConstant(PartOffset, DL)); in LowerFormalArguments()
1308 assert (Outs[I].PartOffset == 0); in LowerCall()
1311 unsigned PartOffset = Outs[I + 1].PartOffset; in LowerCall() local
1313 DAG.getIntPtrConstant(PartOffset, DL)); in LowerCall()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 883 if(Arg.PartOffset > 0) continue; in parseFunctionArgs()
897 while ((i != e) && (In[i].PartOffset == Offset)) { in parseExternFuncCallArgs()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1793 unsigned PartOffset = VA.getLocMemOffset(); in LowerFormalArguments() local
1796 MachinePointerInfo PtrInfo(UndefValue::get(PtrTy), PartOffset - ValBase); in LowerFormalArguments()
|
| D | SIISelLowering.cpp | 651 NewArg.PartOffset += NewArg.VT.getStoreSize(); in LowerFormalArguments()
974 NewOut.PartOffset += NewOut.VT.getStoreSize(); in LowerReturn()
|
| D | AMDGPUISelLowering.cpp | 2760 Ins[i].OrigArgIndex, Ins[i].PartOffset); in getOriginalFunctionArgs()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2879 if (Ins[i].PartOffset == 0) { in LowerMemArgument()
2907 DAG.getIntPtrConstant(Ins[i].PartOffset, dl)); in LowerMemArgument()
2911 Ins[i].PartOffset)); in LowerMemArgument()
|