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Searched refs:PredRegFlags (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h406 unsigned &PredRegPos, unsigned &PredRegFlags) const;
DHexagonHardwareLoops.cpp443 unsigned PredR, PredPos, PredRegFlags; in findInductionRegister() local
444 if (!TII->getPredReg(Cond, PredR, PredPos, PredRegFlags)) in findInductionRegister()
615 unsigned PredReg, PredPos, PredRegFlags; in getLoopTripCount() local
616 if (!TII->getPredReg(Cond, PredReg, PredPos, PredRegFlags)) in getLoopTripCount()
DHexagonInstrInfo.cpp1389 unsigned PredReg, PredRegPos, PredRegFlags; in PredicateInstruction() local
1390 bool GotPredReg = getPredReg(Cond, PredReg, PredRegPos, PredRegFlags); in PredicateInstruction()
1393 T.addReg(PredReg, PredRegFlags); in PredicateInstruction()
4105 unsigned &PredReg, unsigned &PredRegPos, unsigned &PredRegFlags) const { in getPredReg()
4116 PredRegFlags = 0; in getPredReg()
4118 PredRegFlags = RegState::Implicit; in getPredReg()
4120 PredRegFlags |= RegState::Undef; in getPredReg()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp462 unsigned PredR, PredPos, PredRegFlags; in findInductionRegister() local
463 if (!TII->getPredReg(Cond, PredR, PredPos, PredRegFlags)) in findInductionRegister()
648 unsigned PredReg, PredPos, PredRegFlags; in getLoopTripCount() local
649 if (!TII->getPredReg(Cond, PredReg, PredPos, PredRegFlags)) in getLoopTripCount()
DHexagonInstrInfo.h468 unsigned &PredRegPos, unsigned &PredRegFlags) const;
DHexagonInstrInfo.cpp1538 unsigned PredReg, PredRegPos, PredRegFlags; in PredicateInstruction() local
1539 bool GotPredReg = getPredReg(Cond, PredReg, PredRegPos, PredRegFlags); in PredicateInstruction()
1542 T.addReg(PredReg, PredRegFlags); in PredicateInstruction()
4205 unsigned &PredReg, unsigned &PredRegPos, unsigned &PredRegFlags) const { in getPredReg()
4216 PredRegFlags = 0; in getPredReg()
4218 PredRegFlags = RegState::Implicit; in getPredReg()
4220 PredRegFlags |= RegState::Undef; in getPredReg()