Searched refs:PrefReg (Results 1 – 11 of 11) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 755 void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument
759 RegAllocHints[VReg].second.push_back(PrefReg); in setRegAllocationHint()
764 void addRegAllocationHint(unsigned VReg, unsigned PrefReg) { in addRegAllocationHint() argument
766 RegAllocHints[VReg].second.push_back(PrefReg); in addRegAllocationHint()
771 void setSimpleHint(unsigned VReg, unsigned PrefReg) { in setSimpleHint() argument
772 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 670 void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument
673 RegAllocHints[VReg].second = PrefReg; in setRegAllocationHint()
678 void setSimpleHint(unsigned VReg, unsigned PrefReg) { in setSimpleHint() argument
679 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 251 void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument
253 RegAllocHints[Reg].second = PrefReg; in setRegAllocationHint()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | SpillPlacement.h | 72 PrefReg, ///< Block entry/exit prefers a register. enumerator
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| D | RegAllocGreedy.cpp | 685 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
686 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
907 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()
909 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | SpillPlacement.h | 83 PrefReg, ///< Block entry/exit prefers a register. enumerator
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| D | SpillPlacement.cpp | 142 case PrefReg: in addBias()
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| D | RegAllocGreedy.cpp | 1185 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
1186 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
1586 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()
1588 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()
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| /external/llvm/lib/CodeGen/ |
| D | SpillPlacement.h | 83 PrefReg, ///< Block entry/exit prefers a register. enumerator
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| D | SpillPlacement.cpp | 134 case PrefReg: in addBias()
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| D | RegAllocGreedy.cpp | 947 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
948 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
1173 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()
1175 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()
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