| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 532 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSMRD() local
538 .addReg(PtrReg) in selectSMRD()
548 .addReg(PtrReg) in selectSMRD()
561 .addReg(PtrReg) in selectSMRD()
568 unsigned PtrReg = I.getOperand(1).getReg(); in selectSMRD() local
571 .addReg(PtrReg) in selectSMRD()
584 unsigned PtrReg = I.getOperand(1).getReg(); in selectG_LOAD() local
610 .addReg(PtrReg) in selectG_LOAD()
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| D | AMDGPUCallLowering.cpp | 78 unsigned PtrReg = lowerParameterPtr(MIRBuilder, ParamTy, Offset); in lowerParameter() local
86 MIRBuilder.buildLoad(DstReg, PtrReg, *MMO); in lowerParameter()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 950 unsigned PtrReg = MI.getOperand(1).getReg(); in lower() local
959 MIRBuilder.buildLoad(DstReg, PtrReg, MMO); in lower()
967 MIRBuilder.buildLoad(TmpReg, PtrReg, MMO); in lower()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1019 const unsigned PtrReg = I.getOperand(1).getReg(); in select() local
1021 const RegisterBank &PtrRB = *RBI.getRegBank(PtrReg, MRI, TRI); in select()
1025 assert(MRI.getType(PtrReg).isPointer() && in select()
1040 auto *PtrMI = MRI.getVRegDef(PtrReg); in select()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 4750 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
4800 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitPartwordAtomicBinary()
4803 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitPartwordAtomicBinary()
4818 .addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
4829 .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
5072 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
5132 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitInstrWithCustomInserter()
5135 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitInstrWithCustomInserter()
5157 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
5173 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 8541 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
8591 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitPartwordAtomicBinary()
8594 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitPartwordAtomicBinary()
8609 .addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
8620 .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
9256 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
9316 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitInstrWithCustomInserter()
9319 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitInstrWithCustomInserter()
9341 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
9357 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9837 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
9889 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitPartwordAtomicBinary()
9892 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitPartwordAtomicBinary()
9907 .addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
9944 .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
10624 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
10686 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitInstrWithCustomInserter()
10689 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitInstrWithCustomInserter()
10711 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
10727 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
[all …]
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