| /external/libjpeg-turbo/ |
| D | jdcoefct.c | 424 JLONG Q00, Q01, Q02, Q10, Q11, Q20, num; in decompress_smooth_data() local
487 Q20 = quanttbl->quantval[Q20_POS]; in decompress_smooth_data()
559 pred = (int)(((Q20 << 7) + num) / (Q20 << 8)); in decompress_smooth_data()
563 pred = (int)(((Q20 << 7) - num) / (Q20 << 8)); in decompress_smooth_data()
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| /external/libxaac/decoder/ |
| D | ixheaacd_constants.h | 43 #define Q20 1048576 macro
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 139 case AArch64::Q20: in isOdd()
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| D | AArch64RegisterInfo.td | 394 def Q20 : AArch64Reg<20, "q20", [D20], ["v20", ""]>, DwarfRegAlias<B20>;
753 def Z20 : AArch64Reg<20, "z20", [Q20, Z20_HI]>, DwarfRegNum<[116]>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 139 case AArch64::Q20: in isOdd()
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| D | AArch64RegisterInfo.td | 375 def Q20 : AArch64Reg<20, "q20", [D20], ["v20", ""]>, DwarfRegAlias<B20>;
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1247 case AArch64::Q19: Reg = AArch64::Q20; break; in getNextVectorRegister()
1248 case AArch64::Q20: Reg = AArch64::Q21; break; in getNextVectorRegister()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1135 case AArch64::Q19: Reg = AArch64::Q20; break; in getNextVectorRegister()
1136 case AArch64::Q20: Reg = AArch64::Q21; break; in getNextVectorRegister()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 260 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
440 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 301 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
625 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 161 Q20 = 141,
2593 …h64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArc…
3840 { AArch64::Q20, 84U },
4119 { AArch64::Q20, 84U },
19336 …h64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArc…
19338 …h64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArc…
19356 …h64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArc…
19358 …h64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArc…
19360 …h64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArc…
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| D | AArch64GenAsmMatcher.inc | 10853 case AArch64::Q20: OpKind = MCK_FPR128; break;
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1877 .Case("v20", AArch64::Q20) in matchVectorRegName()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2072 .Case("v20", AArch64::Q20) in MatchNeonVectorRegName()
|