Searched refs:Q30 (Results 1 – 13 of 13) sorted by relevance
| /external/libxaac/decoder/ |
| D | ixheaacd_constants.h | 49 #define Q30 1073741824 macro
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 144 case AArch64::Q30: in isOdd()
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| D | AArch64RegisterInfo.td | 404 def Q30 : AArch64Reg<30, "q30", [D30], ["v30", ""]>, DwarfRegAlias<B30>;
763 def Z30 : AArch64Reg<30, "z30", [Q30, Z30_HI]>, DwarfRegNum<[126]>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 144 case AArch64::Q30: in isOdd()
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| D | AArch64RegisterInfo.td | 385 def Q30 : AArch64Reg<30, "q30", [D30], ["v30", ""]>, DwarfRegAlias<B30>;
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1257 case AArch64::Q29: Reg = AArch64::Q30; break; in getNextVectorRegister()
1258 case AArch64::Q30: Reg = AArch64::Q31; break; in getNextVectorRegister()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1145 case AArch64::Q29: Reg = AArch64::Q30; break; in getNextVectorRegister()
1146 case AArch64::Q30: Reg = AArch64::Q31; break; in getNextVectorRegister()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 262 AArch64::Q30, AArch64::Q31
442 AArch64::Q30, AArch64::Q31
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 303 AArch64::Q30, AArch64::Q31
627 AArch64::Q30, AArch64::Q31
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 171 Q30 = 151,
2593 … AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31,
3850 { AArch64::Q30, 94U },
4129 { AArch64::Q30, 94U },
19336 …ch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 };
19338 …ch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 };
19356 …ch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 };
19358 …ch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 };
19360 …ch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 };
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| D | AArch64GenAsmMatcher.inc | 10863 case AArch64::Q30: OpKind = MCK_FPR128; break;
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1887 .Case("v30", AArch64::Q30) in matchVectorRegName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2082 .Case("v30", AArch64::Q30) in MatchNeonVectorRegName()
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