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Searched refs:R22 (Results 1 – 25 of 58) sorted by relevance

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/external/boringssl/src/crypto/poly1305/
Dpoly1305_vec.c65 } R20, R21, R22, R23, R24, S21, S22, S23, S24; member
114 p->R22.d[1] = (uint32_t)(r2); in CRYPTO_poly1305_init()
115 p->R22.d[3] = (uint32_t)(r2 >> 32); in CRYPTO_poly1305_init()
153 r2 = ((uint64_t)p->R22.d[3] << 32) | (uint64_t)p->R22.d[1]; in poly1305_first_block()
186 p->R22.v = in poly1305_first_block()
195 p->S22.v = _mm_mul_epu32(p->R22.v, FIVE); in poly1305_first_block()
207 p->R22.d[1] = (uint32_t)(r2); in poly1305_first_block()
208 p->R22.d[3] = (uint32_t)(r2 >> 32); in poly1305_first_block()
250 T2 = _mm_mul_epu32(H0, p->R22.v); in poly1305_blocks()
270 T6 = _mm_mul_epu32(H1, p->R22.v); in poly1305_blocks()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVRRegisterInfo.td67 def R22 : AVRReg<22, "r22">, DwarfRegNum<[22]>;
95 def R23R22 : AVRReg<22, "r23:r22", [R22, R23]>, DwarfRegNum<[22]>;
117 add R24, R25, R18, R19, R20, R21, R22, R23,
135 add R24, R25, R18, R19, R20, R21, R22, R23,
145 add R23, R22, R21, R20, R19, R18, R17, R16
DAVRCallingConv.td21 // i16 are returned in R25:R24, R23:R22, R21:R20 and R19:R18.
49 CCIfType<[i8], CCAssignToReg<[R24,R22]>>,
/external/llvm/lib/Target/AVR/
DAVRRegisterInfo.td67 def R22 : AVRReg<22, "r22">, DwarfRegNum<[22]>;
95 def R23R22 : AVRReg<22, "r23:r22", [R22, R23]>, DwarfRegNum<[22]>;
119 add R24, R25, R18, R19, R20, R21, R22, R23,
137 add R24, R25, R18, R19, R20, R21, R22, R23,
147 add R23, R22, R21, R20, R19, R18, R17, R16
DAVRCallingConv.td21 // i16 are returned in R25:R24, R23:R22, R21:R20 and R19:R18.
56 CCIfType<[i8], CCAssignToReg<[R24,R22]>>,
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/
DMBlazeBaseInfo.h127 case MBlaze::R22 : return 22; in getMBlazeRegisterNumbering()
192 case 22 : return MBlaze::R22; in getMBlazeRegisterFromNumbering()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUCallingConv.td27 R21, R22, R23, R24, R25, R26, R27, R28, R29,
44 R21, R22, R23, R24, R25, R26, R27, R28, R29,
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/
Dtwo-extenders.s102 {R22 = #1; memb(##0x1000) = R22.new}
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/
DARCRegisterInfo.td55 def R22 : Core<22, "%r22">, DwarfRegNum<[22]>;
74 R20, R21, R22, R23, R24, R25, GP, FP, SP, ILINK, R30, BLINK)>;
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCFrameLowering.h163 {PPC::R22, -40}, in getCalleeSavedSpillSlots()
242 {PPC::R22, -76}, in getCalleeSavedSpillSlots()
/external/linux-kselftest/tools/testing/selftests/powerpc/stringloops/asm/
Dppc_asm.h23 #define R22 r22 macro
/external/linux-kselftest/tools/testing/selftests/powerpc/copyloops/asm/
Dppc_asm.h18 #define R22 r22 macro
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp108 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
117 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
DHexagonFrameLowering.h66 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 }, in getCalleeSavedSpillSlots()
/external/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiBaseInfo.h94 case Lanai::R22: in getLanaiRegisterNumbering()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiBaseInfo.h94 case Lanai::R22: in getLanaiRegisterNumbering()
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaRegisterInfo.td60 def R22 : GPR<22, "$22">, DwarfRegNum<[22]>;
115 R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22,
/external/autotest/test_suites/
Dcontrol.power_requirements17 Ex: x86-mario-release/R22-2494.33.0
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/
DPPCBaseInfo.h53 case R22: case X22: case F22: case V22: case CR5EQ: return 22; in getPPCRegisterNumbering()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp106 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
115 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
DHexagonRegisterInfo.td109 def D11 : Rd<22, "r23:22", [R22, R23]>, DwarfRegNum<[54]>;
309 (add R23, R22, R21, R20, R19, R18, R17, R16,
393 : CalleeSavedRegs<(add R16, R17, R18, R19, R20, R21, R22, R23,
DHexagonFrameLowering.h89 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 }, in getCalleeSavedSpillSlots()
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeRegisterInfo.cpp61 MBlaze::R20, MBlaze::R21, MBlaze::R22, MBlaze::R23, in getCalleeSavedRegs()
/external/llvm/lib/Target/Lanai/Disassembler/
DLanaiDisassembler.cpp159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/Disassembler/
DLanaiDisassembler.cpp157 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,

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