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Searched refs:R4 (Results 1 – 25 of 573) sorted by relevance

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/external/libxaac/decoder/armv7/
Dixheaacd_rescale_subbandsamples.s26 STMFD SP!, {R4-R11, R14}
27 LDR R4, [SP, #44]
30 MOVS R4, R4
40 CMP R4, #31
41 MOVGT R4, #31
42 CMP R4, #-31
43 MOVLT R4, #-31
51 MOVS R4, R4
63 MOV R11, R11, LSL R4
66 MOVGE R5, R5, LSL R4
[all …]
Dixheaacd_calcmaxspectralline.s28 STMFD sp!, {R4-R12, R14}
29 MOV R4, R1, LSR #3
30 MOV R6, R4, LSL #3
42 SUBS R4, R4, #1
51 VMOV.32 R4, D6[0]
54 ORR R4, R4, R1
56 ORR R4, R4, R2
59 ORR R4, R4, R3
66 ORR R4, R4, R2
72 MOVS R0, R4
[all …]
Dixheaacd_enery_calc_per_subband.s30 MOV R4, R2
41 SUBS R5, R5, R4
55 ADD R0, R0, R4, LSL #2
64 ADD R0, R0, R4, LSL #2
82 LDR R4, [R8], #0x100
84 EOR R4, R4, R4, ASR #31
85 ORR R6, R6, R4
101 LDR R4, [R8], #0x100
104 MOV R4, R4, ASR R14
105 SMLABB R6, R4, R4, R6
[all …]
Dixheaacd_tns_parcor2lpc_32x16.s26 STMFD SP!, {R2, R4-R12, R14}
28 MOV R4, SP
36 STR R6, [R4], #4
37 STR R6, [R4, #60]
41 SUB R4, R4, #64
49 LDRSH R2, [R4], #2
61 STRH R14, [R4, #62]
68 @ LDRGTSH R2, [R4], #2
70 LDRSHGT R2, [R4], #2
74 LDRSH R2, [R4, #62]
[all …]
Dixheaacd_esbr_fwd_modulation.s31 LDR R4, [R3]
32 ADD R5, R0, R4, LSL #3
57 SUBS R4, R4, #8
63 LDR R4, [SP, #124]
67 ADD R2, R4, R5
68 ADD R3, R4, #0xB8
75 LDRSH R4, [R3, #0x2C]
78 SUB R4, R4, R5
96 SUBS R4, R4, #2
Dixheaacd_apply_rot.s27 STMFD SP!, {R4-R12, R14}
29 MOV R4, #22
60 SUBS R4, R4, #2
73 MOVW R4, #0x53C
75 ADD R11, R0, R4
76 MOV R4, #10
115 SUBS R4, R4, #1
127 MOV R4, #12
146 SUBS R4, R4, #1
149 MOV R4, #3
[all …]
Dixheaacd_overlap_add1.s29 STMFD sp!, {R4-R12, R14}
32 LDR R4, [SP, #104]
46 VDUP.16 Q11, R4
61 MOV R4, R6, LSL #1
62 RSB R4, R4, #0
124 VST1.16 D26[0], [R11], R4
126 VST1.16 D26[1], [R11], R4
128 VST1.16 D26[2], [R11], R4
130 VST1.16 D26[3], [R11], R4
176 VST1.16 D26[0], [R11], R4
[all …]
Dixheaacd_dec_DCT2_64_asm.s38 MOV R4, #-4
92 ADD R4, R2, #30
94 SUB R4, R4, #6
97 VLD1.16 D10, [R4], R10
133 VLD1.16 D10, [R4], R10
177 VLD1.16 D10, [R4], R10
230 VLD1.16 D10, [R4], R10
308 SUB R4, R1, #2
328 SUB R4, R4, #6
382 VST1.16 D24, [R4]
[all …]
Dixheaacd_overlap_add2.s28 STMFD sp!, {R4-R12, R14}
31 LDR R4, [SP, #104]
34 RSB R4, R4, #15
35 CMP R4, #31
36 MOVGT R4, #31
37 SUB R9, R4, #1
40 RSB R4, R4, #0
41 VDUP.32 Q11, R4
52 ADD R4, R4, #1
55 MOV R4, #0x8000
[all …]
/external/boringssl/src/ssl/test/runner/poly1305/
Dsum_arm.s28 MOVM.IB [R4-R7], (R8)
34 MOVW R4>>14, R11
37 ORR R4<<12, g, g
42 AND g, R4, R4
48 EOR R4, R4, R4
55 MOVM.DA (R0), [R4-R7]
76 MOVM.IB [R4-R8, R14], (R12)
89 MOVM.IA [R0-R4], (g)
113 MOVW R3>>8, R4
124 ORR R3, R4, R4
[all …]
Dsum_ref.go24 R1, R2, R3, R4 := r1*5, r2*5, r3*5, r4*5
35 …d0 := (uint64(h0) * r0) + (uint64(h1) * R4) + (uint64(h2) * R3) + (uint64(h3) * R2) + (uint64(h4) …
36 …d1 := (d0 >> 26) + (uint64(h0) * r1) + (uint64(h1) * r0) + (uint64(h2) * R4) + (uint64(h3) * R3) +…
37 …d2 := (d1 >> 26) + (uint64(h0) * r2) + (uint64(h1) * r1) + (uint64(h2) * r0) + (uint64(h3) * R4) +…
38 …+ (uint64(h0) * r3) + (uint64(h1) * r2) + (uint64(h2) * r1) + (uint64(h3) * r0) + (uint64(h4) * R4)
68 …d0 := (uint64(h0) * r0) + (uint64(h1) * R4) + (uint64(h2) * R3) + (uint64(h3) * R2) + (uint64(h4) …
69 …d1 := (d0 >> 26) + (uint64(h0) * r1) + (uint64(h1) * r0) + (uint64(h2) * R4) + (uint64(h3) * R3) +…
70 …d2 := (d1 >> 26) + (uint64(h0) * r2) + (uint64(h1) * r1) + (uint64(h2) * r0) + (uint64(h3) * R4) +…
71 …+ (uint64(h0) * r3) + (uint64(h1) * r2) + (uint64(h2) * r1) + (uint64(h3) * r0) + (uint64(h4) * R4)
/external/selinux/libselinux/src/
Dsha1.c57 #define R4(v,w,x,y,z,i) z += (w^x^y) + blk(i) + 0xCA62C1D6 + rol(v,5); w=rol(w,30); macro
106 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in TransformFunction()
107 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in TransformFunction()
108 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in TransformFunction()
109 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in TransformFunction()
110 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in TransformFunction()
/external/mesa3d/src/util/sha1/
Dsha1.c44 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
86 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
87 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
88 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
89 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
90 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/external/openssh/openbsd-compat/
Dsha1.c46 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
88 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
89 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
90 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
91 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
92 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/external/ppp/pppd/
Dsha1.c40 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
84 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1_Transform()
85 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1_Transform()
86 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1_Transform()
87 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1_Transform()
88 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1_Transform()
/external/webrtc/webrtc/base/
Dsha1.cc146 #define R4(v, w, x, y, z, i) \ macro
205 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
206 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
207 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
208 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
209 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/external/wpa_supplicant_8/src/crypto/
Dsha1-internal.c155 #define R4(v,w,x,y,z,i) \ macro
213 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
214 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
215 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
216 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
217 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Datomic.ll82 ; CHECK: sll $[[R4:[0-9]+]], $[[R3]], 3
84 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
86 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
98 ; CHECK: srlv $[[R16:[0-9]+]], $[[R15]], $[[R4]]
113 ; CHECK: sll $[[R4:[0-9]+]], $[[R3]], 3
115 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
117 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
129 ; CHECK: srlv $[[R16:[0-9]+]], $[[R15]], $[[R4]]
144 ; CHECK: sll $[[R4:[0-9]+]], $[[R3]], 3
146 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/Windows/
Dvla.ll16 ; CHECK-SMALL-CODE: adds [[R4:r[0-9]+]], #7
17 ; CHECK-SMALL-CODE: bic [[R4]], [[R4]], #7
18 ; CHECK-SMALL-CODE: lsrs r4, [[R4]], #2
22 ; CHECK-LARGE-CODE: adds [[R4:r[0-9]+]], #7
23 ; CHECK-LARGE-CODE: bic [[R4]], [[R4]], #7
24 ; CHECK-LARGE-CODE: lsrs r4, [[R4]], #2
/external/llvm/test/CodeGen/ARM/Windows/
Dvla.ll16 ; CHECK-SMALL-CODE: adds [[R4:r[0-9]+]], #7
17 ; CHECK-SMALL-CODE: bic [[R4]], [[R4]], #7
18 ; CHECK-SMALL-CODE: lsrs r4, [[R4]], #2
22 ; CHECK-LARGE-CODE: adds [[R4:r[0-9]+]], #7
23 ; CHECK-LARGE-CODE: bic [[R4]], [[R4]], #7
24 ; CHECK-LARGE-CODE: lsrs r4, [[R4]], #2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/
Dldm-stm-base-materialization-thumb2.ll17 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
18 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
38 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
39 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
57 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
58 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
59 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
60 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
78 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
79 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dldm-stm-base-materialization.ll17 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R…
18 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
38 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
39 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
57 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
58 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
59 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
60 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
78 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
79 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
[all …]
/external/llvm/test/CodeGen/Thumb/
Dldm-stm-base-materialization-thumb2.ll17 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
18 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
38 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
39 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
57 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
58 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
59 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
60 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
78 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
79 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
[all …]
/external/llvm/test/CodeGen/ARM/
Dldm-stm-base-materialization.ll17 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R…
18 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
38 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
39 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
57 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
58 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
59 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
60 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
78 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
79 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
D3r_splat.ll26 ; MIPS32-DAG: splat.b [[R4:\$w[0-9]+]], [[R3]][$4]
27 ; MIPS32-DAG: st.b [[R4]], 0([[R2]])
47 ; MIPS32-DAG: splat.h [[R4:\$w[0-9]+]], [[R3]][$4]
48 ; MIPS32-DAG: st.h [[R4]], 0([[R2]])
68 ; MIPS32-DAG: splat.w [[R4:\$w[0-9]+]], [[R3]][$4]
69 ; MIPS32-DAG: st.w [[R4]], 0([[R2]])
89 ; MIPS32-DAG: splat.d [[R4:\$w[0-9]+]], [[R3]][$4]
90 ; MIPS32-DAG: st.d [[R4]], 0([[R2]])
104 ; MIPS32-DAG: splat.d [[R4:\$w[0-9]+]], [[R3]][$4]
105 ; MIPS32-DAG: st.d [[R4]], 0([[R2]])
[all …]

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