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Searched refs:RADEON_SPARSE_PAGE_SIZE (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_bo.c693 assert(bo->u.sparse.num_backing_pages < DIV_ROUND_UP(bo->base.size, RADEON_SPARSE_PAGE_SIZE)); in sparse_backing_alloc()
697 … bo->base.size - (uint64_t)bo->u.sparse.num_backing_pages * RADEON_SPARSE_PAGE_SIZE); in sparse_backing_alloc()
698 size = MAX2(size, RADEON_SPARSE_PAGE_SIZE); in sparse_backing_alloc()
700 buf = amdgpu_bo_create(&bo->ws->base, size, RADEON_SPARSE_PAGE_SIZE, in sparse_backing_alloc()
710 pages = buf->size / RADEON_SPARSE_PAGE_SIZE; in sparse_backing_alloc()
743 bo->u.sparse.num_backing_pages -= backing->bo->base.size / RADEON_SPARSE_PAGE_SIZE; in sparse_free_backing_buffer()
814 backing->chunks[0].end == backing->bo->base.size / RADEON_SPARSE_PAGE_SIZE) in sparse_backing_free()
828 (uint64_t)bo->u.sparse.num_va_pages * RADEON_SPARSE_PAGE_SIZE, in amdgpu_bo_sparse_destroy()
866 if (size > (uint64_t)INT32_MAX * RADEON_SPARSE_PAGE_SIZE) in amdgpu_bo_sparse_create()
874 bo->base.alignment = RADEON_SPARSE_PAGE_SIZE; in amdgpu_bo_sparse_create()
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/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_winsys.h69 #define RADEON_SPARSE_PAGE_SIZE (64 * 1024) macro
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_get.c252 return RADEON_SPARSE_PAGE_SIZE; in si_get_param()