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Searched refs:RADV_DYNAMIC_STENCIL_WRITE_MASK (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_pipeline.c1021 return RADV_DYNAMIC_STENCIL_WRITE_MASK; in radv_dynamic_state_mask()
1138 if (states & RADV_DYNAMIC_STENCIL_WRITE_MASK) { in radv_pipeline_init_dynamic_state()
Dradv_private.h750 RADV_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, enumerator
Dradv_cmd_buffer.c156 if (copy_mask & RADV_DYNAMIC_STENCIL_WRITE_MASK) { in radv_bind_dynamic_state()
160 dest_mask |= RADV_DYNAMIC_STENCIL_WRITE_MASK; in radv_bind_dynamic_state()