Searched refs:RCC_BDCR (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/mach-stm32mp/ |
| D | cpu.c | 19 #define RCC_BDCR (STM32_RCC_BASE + 0x0140) macro
75 if (!(readl(RCC_BDCR) & RCC_BDCR_RTCSRC)) { in security_init()
76 setbits_le32(RCC_BDCR, RCC_BDCR_VSWRST); in security_init()
77 while (!(readl(RCC_BDCR) & RCC_BDCR_VSWRST)) in security_init()
79 clrbits_le32(RCC_BDCR, RCC_BDCR_VSWRST); in security_init()
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| /external/u-boot/drivers/clk/ |
| D | clk_stm32mp1.c | 65 #define RCC_BDCR 0x140 macro
1151 setbits_le32(rcc + RCC_BDCR, RCC_BDCR_LSEBYP); in stm32mp1_lse_enable()
1157 value = (readl(rcc + RCC_BDCR) & RCC_BDCR_LSEDRV_MASK) in stm32mp1_lse_enable()
1166 clrsetbits_le32(rcc + RCC_BDCR, in stm32mp1_lse_enable()
1171 stm32mp1_ls_osc_set(1, rcc, RCC_BDCR, RCC_BDCR_LSEON); in stm32mp1_lse_enable()
1176 stm32mp1_osc_wait(1, rcc, RCC_BDCR, RCC_BDCR_LSERDY); in stm32mp1_lse_wait()
1463 u32 address = priv->base + RCC_BDCR; in set_rtcsrc()
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