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Searched refs:RC_MASK_W (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_pair_regalloc.c100 {RC_MASK_W,
104 {RC_MASK_X | RC_MASK_W,
105 RC_MASK_Y | RC_MASK_W,
106 RC_MASK_Z | RC_MASK_W}},
108 {RC_MASK_X | RC_MASK_Y | RC_MASK_W,
109 RC_MASK_X | RC_MASK_Z | RC_MASK_W,
110 RC_MASK_Y | RC_MASK_Z | RC_MASK_W}},
112 {RC_MASK_X | RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
140 {RC_MASK_X | RC_MASK_W,
144 {RC_MASK_Y | RC_MASK_W,
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Dradeon_program_constants.h150 #define RC_MASK_W 8 macro
153 #define RC_MASK_XYW (RC_MASK_X|RC_MASK_Y|RC_MASK_W)
154 #define RC_MASK_XYZW (RC_MASK_X|RC_MASK_Y|RC_MASK_Z|RC_MASK_W)
Dradeon_program_alu.c280 src0.Negate &= ~(RC_MASK_Z | RC_MASK_W); in transform_DP2()
283 src1.Negate &= ~(RC_MASK_Z | RC_MASK_W); in transform_DP2()
294 src0.Negate &= ~RC_MASK_W; in transform_DPH()
400 dstregtmpmask(temp, RC_MASK_W), in transform_LIT()
403 dstregtmpmask(temp, RC_MASK_W), in transform_LIT()
407 dstregtmpmask(temp, RC_MASK_W), in transform_LIT()
445 tempdst.WriteMask = RC_MASK_W; in transform_POW()
746 src0.Negate &= ~RC_MASK_W; in transform_r300_vertex_DP3()
749 src1.Negate &= ~RC_MASK_W; in transform_r300_vertex_DP3()
1022 emit3(c, inst->Prev, RC_OPCODE_MAD, 0, dstregtmpmask(tempreg, RC_MASK_W), in r300_transform_trig_simple()
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Dr3xx_fragprog.c48 callback(data, c->OutputDepth, RC_MASK_W); in dataflow_outputs_mark_use()
65 inst->DstReg.WriteMask = RC_MASK_W; in rc_rewrite_depth_out()
Dradeon_opcodes.c578 srcmasks[0] |= RC_MASK_W; in rc_compute_sources_for_writemask()
626 srcmasks[1] |= RC_MASK_Y | RC_MASK_W; in rc_compute_sources_for_writemask()
633 srcmasks[0] |= RC_MASK_X | RC_MASK_Y | RC_MASK_W; in rc_compute_sources_for_writemask()
Dr300_fragprog_swizzle.c190 if (mask & RC_MASK_W) in r300_swizzle_split()
191 best_matchmask |= RC_MASK_W; in r300_swizzle_split()
Dradeon_program_tex.c92 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; in projective_divide()
183 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; in radeonTransformTEX()
194 inst_mul->U.I.DstReg.WriteMask = RC_MASK_W; in radeonTransformTEX()
210 inst_add->U.I.DstReg.WriteMask = RC_MASK_W; in radeonTransformTEX()
399 inst_mov->U.I.DstReg.WriteMask = RC_MASK_W; in radeonTransformTEX()
427 inst_mov->U.I.DstReg.WriteMask = RC_MASK_W; in radeonTransformTEX()
Dradeon_pair_translate.c91 *needalpha = (inst->DstReg.WriteMask & RC_MASK_W) ? 1 : 0; in classify_instruction()
278 !!(inst->SrcReg[i].Negate & RC_MASK_W); in set_pair_instruction()
Dradeon_dataflow_deadcode.c175 usedmask |= RC_MASK_W; in update_instruction()
346 usemask |= RC_MASK_W; in rc_dataflow_deadcode()
Dradeon_variable.c61 if (var_ptr->Dst.WriteMask == RC_MASK_W) { in rc_variable_change_dst()
62 assert(new_writemask & RC_MASK_W); in rc_variable_change_dst()
Dradeon_dataflow.c127 if (inst->Alpha.Src[src].Used && (refmasks[src] & RC_MASK_W)) in reads_pair()
128 cb(userdata, fullinst, inst->Alpha.Src[src].File, inst->Alpha.Src[src].Index, RC_MASK_W); in reads_pair()
276 cb(userdata, fullinst, RC_FILE_TEMPORARY, inst->Alpha.DestIndex, RC_MASK_W); in writes_pair()
Dradeon_compiler_util.c110 case RC_MASK_W: return RC_SWIZZLE_W; in rc_mask_to_swizzle()
355 if (mask & RC_MASK_W) in rc_source_type_mask()
Dradeon_vert_fc.c56 dst->WriteMask = RC_MASK_W; in build_pred_dst()
Dradeon_program_print.c158 if (mask & RC_MASK_W) fprintf(f, "w"); in rc_print_mask()
Dradeon_compiler.c255 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W; in rc_transform_fragment_wpos()
Dradeon_pair_schedule.c944 pair_inst->Alpha.WriteMask = RC_MASK_W; in convert_rgb_to_alpha()
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
Drc_test_helpers.c331 inst->U.I.DstReg.WriteMask |= RC_MASK_W; in init_rc_normal_dst()