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Searched refs:RC_MASK_XYZW (Results 1 – 19 of 19) sorted by relevance

/external/mesa3d/src/gallium/drivers/r300/compiler/
Dr3xx_fragprog.c44 callback(data, c->OutputColor[0], RC_MASK_XYZW); in dataflow_outputs_mark_use()
45 callback(data, c->OutputColor[1], RC_MASK_XYZW); in dataflow_outputs_mark_use()
46 callback(data, c->OutputColor[2], RC_MASK_XYZW); in dataflow_outputs_mark_use()
47 callback(data, c->OutputColor[3], RC_MASK_XYZW); in dataflow_outputs_mark_use()
Dradeon_pair_regalloc.c344 writemask = RC_MASK_XYZW; in variable_get_class()
466 return reg / RC_MASK_XYZW; in reg_get_index()
471 return (reg % RC_MASK_XYZW) + 1; in reg_get_writemask()
480 return (index * RC_MASK_XYZW) + (writemask - 1); in get_reg_id()
502 for(a_mask = 1; a_mask <= RC_MASK_XYZW; a_mask++) { in add_register_conflicts()
503 for (b_mask = a_mask + 1; b_mask <= RC_MASK_XYZW; in add_register_conflicts()
696 s->regs = ra_alloc_reg_set(NULL, R500_PFS_NUM_TEMP_REGS * RC_MASK_XYZW, in rc_init_regalloc_state()
Dradeon_opcodes.c539 srcmasks[0] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask()
568 srcmasks[0] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask()
569 srcmasks[1] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask()
573 srcmasks[1] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask()
Dradeon_emulate_branches.c168 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; in allocate_and_insert_proxies()
187 inst_cmp->U.I.DstReg.WriteMask = RC_MASK_XYZW; in inject_cmp()
190 inst_cmp->U.I.SrcReg[0].Negate = RC_MASK_XYZW; in inject_cmp()
298 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; in fix_output_writes()
Dradeon_program.c160 RC_MASK_XYZW); in rc_find_free_temporary()
176 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in rc_alloc_instruction()
Dr3xx_vertprog.c55 return mask & RC_MASK_XYZW; in t_dst_mask()
170 src->Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in t_src_scalar()
256 vpi->SrcReg[0].Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in ei_lit()
263 vpi->SrcReg[0].Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in ei_lit()
270 vpi->SrcReg[0].Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in ei_lit()
694 new_inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_nonnative_modifiers()
763 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in rc_vs_add_artificial_outputs()
782 callback(data, i, RC_MASK_XYZW); in dataflow_outputs_mark_used()
Dradeon_program_alu.c159 newreg.Negate = newreg.Negate ^ RC_MASK_XYZW; in negate()
370 if (inst->U.I.DstReg.WriteMask != RC_MASK_XYZW || inst->U.I.DstReg.File != RC_FILE_TEMPORARY) { in transform_LIT()
379 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in transform_LIT()
701 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_ABS()
766 dst.WriteMask = RC_MASK_XYZW; in transform_r300_vertex_fix_LIT()
839 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SGT()
840 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SGT()
848 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SLE()
849 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SLE()
1204 inst->U.I.SrcReg[1].Negate = RC_MASK_XYZW; in radeonTransformDeriv()
Dradeon_optimize.c115 sc_data->ReaderData->AbortOnRead = RC_MASK_XYZW; in src_clobbered_reads_cb()
119 sc_data->ReaderData->AbortOnRead = RC_MASK_XYZW; in src_clobbered_reads_cb()
243 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mad()
257 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in constant_folding_mad()
278 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mul()
291 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mul()
Dradeon_program_tex.c173 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in radeonTransformTEX()
230 inst_add->U.I.SrcReg[1].Negate = inst_add->U.I.SrcReg[1].Negate ^ RC_MASK_XYZW; in radeonTransformTEX()
232 inst_add->U.I.SrcReg[0].Negate = inst_add->U.I.SrcReg[0].Negate ^ RC_MASK_XYZW; in radeonTransformTEX()
442 (!c->is_r500 && inst->U.I.DstReg.WriteMask != RC_MASK_XYZW))) { in radeonTransformTEX()
454 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in radeonTransformTEX()
Dradeon_rename_regs.c80 RC_MASK_XYZW); in rc_rename_regs()
Dradeon_program_print.c164 if (dst.WriteMask != RC_MASK_XYZW) { in rc_print_dst_register()
235 int trivial_negate = (src.Negate == RC_MASK_NONE || src.Negate == RC_MASK_XYZW); in rc_print_src_register()
237 if (src.Negate == RC_MASK_XYZW) in rc_print_src_register()
Dradeon_dataflow_swizzles.c75 phase_refmask &= RC_MASK_XYZW; in rewrite_source()
81 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; in rewrite_source()
Dradeon_program_constants.h154 #define RC_MASK_XYZW (RC_MASK_X|RC_MASK_Y|RC_MASK_Z|RC_MASK_W) macro
Dradeon_dataflow_deadcode.c195 refmask &= RC_MASK_XYZW; in update_instruction()
Dradeon_compiler_util.c46 mask &= RC_MASK_XYZW; in rc_swizzle_to_writemask()
Dradeon_compiler.c343 inst_add->U.I.SrcReg[1].Negate = RC_MASK_XYZW; in rc_transform_fragment_face()
Dradeon_dataflow.c51 refmask &= RC_MASK_XYZW; in reads_normal_callback()
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
Drc_test_helpers.c165 src_reg->Negate = RC_MASK_XYZW; in init_rc_normal_src()
311 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in init_rc_normal_dst()
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c186 dst->Negate = src->Register.Negate ? RC_MASK_XYZW : 0; in transform_srcreg()