Searched refs:RC_MASK_XYZW (Results 1 – 19 of 19) sorted by relevance
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | r3xx_fragprog.c | 44 callback(data, c->OutputColor[0], RC_MASK_XYZW); in dataflow_outputs_mark_use() 45 callback(data, c->OutputColor[1], RC_MASK_XYZW); in dataflow_outputs_mark_use() 46 callback(data, c->OutputColor[2], RC_MASK_XYZW); in dataflow_outputs_mark_use() 47 callback(data, c->OutputColor[3], RC_MASK_XYZW); in dataflow_outputs_mark_use()
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D | radeon_pair_regalloc.c | 344 writemask = RC_MASK_XYZW; in variable_get_class() 466 return reg / RC_MASK_XYZW; in reg_get_index() 471 return (reg % RC_MASK_XYZW) + 1; in reg_get_writemask() 480 return (index * RC_MASK_XYZW) + (writemask - 1); in get_reg_id() 502 for(a_mask = 1; a_mask <= RC_MASK_XYZW; a_mask++) { in add_register_conflicts() 503 for (b_mask = a_mask + 1; b_mask <= RC_MASK_XYZW; in add_register_conflicts() 696 s->regs = ra_alloc_reg_set(NULL, R500_PFS_NUM_TEMP_REGS * RC_MASK_XYZW, in rc_init_regalloc_state()
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D | radeon_opcodes.c | 539 srcmasks[0] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask() 568 srcmasks[0] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask() 569 srcmasks[1] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask() 573 srcmasks[1] |= RC_MASK_XYZW; in rc_compute_sources_for_writemask()
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D | radeon_emulate_branches.c | 168 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; in allocate_and_insert_proxies() 187 inst_cmp->U.I.DstReg.WriteMask = RC_MASK_XYZW; in inject_cmp() 190 inst_cmp->U.I.SrcReg[0].Negate = RC_MASK_XYZW; in inject_cmp() 298 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZW; in fix_output_writes()
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D | radeon_program.c | 160 RC_MASK_XYZW); in rc_find_free_temporary() 176 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in rc_alloc_instruction()
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D | r3xx_vertprog.c | 55 return mask & RC_MASK_XYZW; in t_dst_mask() 170 src->Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in t_src_scalar() 256 vpi->SrcReg[0].Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in ei_lit() 263 vpi->SrcReg[0].Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in ei_lit() 270 vpi->SrcReg[0].Negate ? RC_MASK_XYZW : RC_MASK_NONE) | in ei_lit() 694 new_inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_nonnative_modifiers() 763 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in rc_vs_add_artificial_outputs() 782 callback(data, i, RC_MASK_XYZW); in dataflow_outputs_mark_used()
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D | radeon_program_alu.c | 159 newreg.Negate = newreg.Negate ^ RC_MASK_XYZW; in negate() 370 if (inst->U.I.DstReg.WriteMask != RC_MASK_XYZW || inst->U.I.DstReg.File != RC_FILE_TEMPORARY) { in transform_LIT() 379 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in transform_LIT() 701 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_ABS() 766 dst.WriteMask = RC_MASK_XYZW; in transform_r300_vertex_fix_LIT() 839 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SGT() 840 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SGT() 848 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SLE() 849 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in transform_r300_vertex_SLE() 1204 inst->U.I.SrcReg[1].Negate = RC_MASK_XYZW; in radeonTransformDeriv()
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D | radeon_optimize.c | 115 sc_data->ReaderData->AbortOnRead = RC_MASK_XYZW; in src_clobbered_reads_cb() 119 sc_data->ReaderData->AbortOnRead = RC_MASK_XYZW; in src_clobbered_reads_cb() 243 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mad() 257 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; in constant_folding_mad() 278 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mul() 291 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; in constant_folding_mul()
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D | radeon_program_tex.c | 173 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in radeonTransformTEX() 230 inst_add->U.I.SrcReg[1].Negate = inst_add->U.I.SrcReg[1].Negate ^ RC_MASK_XYZW; in radeonTransformTEX() 232 inst_add->U.I.SrcReg[0].Negate = inst_add->U.I.SrcReg[0].Negate ^ RC_MASK_XYZW; in radeonTransformTEX() 442 (!c->is_r500 && inst->U.I.DstReg.WriteMask != RC_MASK_XYZW))) { in radeonTransformTEX() 454 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in radeonTransformTEX()
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D | radeon_rename_regs.c | 80 RC_MASK_XYZW); in rc_rename_regs()
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D | radeon_program_print.c | 164 if (dst.WriteMask != RC_MASK_XYZW) { in rc_print_dst_register() 235 int trivial_negate = (src.Negate == RC_MASK_NONE || src.Negate == RC_MASK_XYZW); in rc_print_src_register() 237 if (src.Negate == RC_MASK_XYZW) in rc_print_src_register()
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D | radeon_dataflow_swizzles.c | 75 phase_refmask &= RC_MASK_XYZW; in rewrite_source() 81 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; in rewrite_source()
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D | radeon_program_constants.h | 154 #define RC_MASK_XYZW (RC_MASK_X|RC_MASK_Y|RC_MASK_Z|RC_MASK_W) macro
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D | radeon_dataflow_deadcode.c | 195 refmask &= RC_MASK_XYZW; in update_instruction()
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D | radeon_compiler_util.c | 46 mask &= RC_MASK_XYZW; in rc_swizzle_to_writemask()
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D | radeon_compiler.c | 343 inst_add->U.I.SrcReg[1].Negate = RC_MASK_XYZW; in rc_transform_fragment_face()
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D | radeon_dataflow.c | 51 refmask &= RC_MASK_XYZW; in reads_normal_callback()
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
D | rc_test_helpers.c | 165 src_reg->Negate = RC_MASK_XYZW; in init_rc_normal_src() 311 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW; in init_rc_normal_dst()
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/external/mesa3d/src/gallium/drivers/r300/ |
D | r300_tgsi_to_rc.c | 186 dst->Negate = src->Register.Negate ? RC_MASK_XYZW : 0; in transform_srcreg()
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