| /external/llvm/test/Transforms/BBVectorize/ |
| D | req-depth.ll | 3 …torize-req-chain-depth 2 -bb-vectorize-ignore-target-info -S | FileCheck %s -check-prefix=CHECK-RD2
13 ; CHECK-RD2-LABEL: @test1(
15 ; CHECK-RD2: <2 x double>
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/atomics/ |
| D | load16.ll | 33 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
48 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
63 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
78 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
93 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| D | elm_copy.ll | 101 ; MIPS32-DAG: copy_s.w [[RD2:\$[0-9]+]], [[WS]][3]
106 ; MIPS32-DAG: sw [[RD2]], 4([[RES]])
199 ; MIPS32-DAG: copy_s.w [[RD2:\$[0-9]+]], [[WS]][3]
204 ; MIPS32-DAG: sw [[RD2]], 4([[RES]])
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/ |
| D | elm_copy.ll | 101 ; MIPS32-DAG: copy_s.w [[RD2:\$[0-9]+]], [[WS]][3]
106 ; MIPS32-DAG: sw [[RD2]], 4([[RES]])
199 ; MIPS32-DAG: copy_s.w [[RD2:\$[0-9]+]], [[WS]][3]
204 ; MIPS32-DAG: sw [[RD2]], 4([[RES]])
|
| /external/clang/lib/Sema/ |
| D | SemaChecking.cpp | 10560 RecordDecl *RD2) { in isLayoutCompatibleStruct() argument
10565 const CXXRecordDecl *D2CXX = cast<CXXRecordDecl>(RD2); in isLayoutCompatibleStruct()
10580 } else if (const CXXRecordDecl *D2CXX = dyn_cast<CXXRecordDecl>(RD2)) { in isLayoutCompatibleStruct()
10587 RecordDecl::field_iterator Field2 = RD2->field_begin(), in isLayoutCompatibleStruct()
10588 Field2End = RD2->field_end(), in isLayoutCompatibleStruct()
10605 RecordDecl *RD2) { in isLayoutCompatibleUnion() argument
10607 for (auto *Field2 : RD2->fields()) in isLayoutCompatibleUnion()
10630 bool isLayoutCompatible(ASTContext &C, RecordDecl *RD1, RecordDecl *RD2) { in isLayoutCompatible() argument
10631 if (RD1->isUnion() != RD2->isUnion()) in isLayoutCompatible()
10635 return isLayoutCompatibleUnion(C, RD1, RD2); in isLayoutCompatible()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3120 unsigned RD2 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() local
3121 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), RD2) in emitMSACBranchPseudo()
3129 .addReg(RD2) in emitMSACBranchPseudo()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3029 unsigned RD2 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() local
3030 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), RD2) in emitMSACBranchPseudo()
3038 .addReg(RD2) in emitMSACBranchPseudo()
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart2.csv | 14263 ,"IT","RD2","Rocca de' Giorgi","Rocca de' Giorgi","PV","--3-----","RL","1207",,"4457N 00915E",
|
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 23150 ,"DE","RD2","Reinhardshagen","Reinhardshagen","HE","--3--6--","RL","1207",,"5129N 00936E",
40273 "+","FR","RD2","Radon","Radon","61","--3-----","RL","1301",,"4831N 00006E",
|
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 22935 ,"US","RD2","Reeder","Reeder","ND","-23--6--","RL","0607",,"4606N 10257W",
|