1 /************************************************************************** 2 * 3 * Copyright 2017 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef _RADEON_VCN_DEC_H 29 #define _RADEON_VCN_DEC_H 30 31 #define RDECODE_PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) 32 #define RDECODE_PKT_TYPE_G(x) (((x) >> 30) & 0x3) 33 #define RDECODE_PKT_TYPE_C 0x3FFFFFFF 34 #define RDECODE_PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) 35 #define RDECODE_PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 36 #define RDECODE_PKT_COUNT_C 0xC000FFFF 37 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0) 38 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 39 #define RDECODE_PKT0_BASE_INDEX_C 0xFFFF0000 40 #define RDECODE_PKT0(index, count) (RDECODE_PKT_TYPE_S(0) | \ 41 RDECODE_PKT0_BASE_INDEX_S(index) | \ 42 RDECODE_PKT_COUNT_S(count)) 43 44 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2)) 45 46 #define RDECODE_CMD_MSG_BUFFER 0x00000000 47 #define RDECODE_CMD_DPB_BUFFER 0x00000001 48 #define RDECODE_CMD_DECODING_TARGET_BUFFER 0x00000002 49 #define RDECODE_CMD_FEEDBACK_BUFFER 0x00000003 50 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER 0x00000005 51 #define RDECODE_CMD_BITSTREAM_BUFFER 0x00000100 52 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204 53 #define RDECODE_CMD_CONTEXT_BUFFER 0x00000206 54 55 #define RDECODE_MSG_CREATE 0x00000000 56 #define RDECODE_MSG_DECODE 0x00000001 57 #define RDECODE_MSG_DESTROY 0x00000002 58 59 #define RDECODE_CODEC_H264 0x00000000 60 #define RDECODE_CODEC_VC1 0x00000001 61 #define RDECODE_CODEC_MPEG2_VLD 0x00000003 62 #define RDECODE_CODEC_MPEG4 0x00000004 63 #define RDECODE_CODEC_H264_PERF 0x00000007 64 #define RDECODE_CODEC_H265 0x00000010 65 66 #define RDECODE_ARRAY_MODE_LINEAR 0x00000000 67 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001 68 #define RDECODE_ARRAY_MODE_1D_THIN 0x00000002 69 #define RDECODE_ARRAY_MODE_2D_THIN 0x00000004 70 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004 71 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED 0x00000005 72 73 #define RDECODE_H264_PROFILE_BASELINE 0x00000000 74 #define RDECODE_H264_PROFILE_MAIN 0x00000001 75 #define RDECODE_H264_PROFILE_HIGH 0x00000002 76 #define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003 77 #define RDECODE_H264_PROFILE_MVC 0x00000004 78 79 #define RDECODE_VC1_PROFILE_SIMPLE 0x00000000 80 #define RDECODE_VC1_PROFILE_MAIN 0x00000001 81 #define RDECODE_VC1_PROFILE_ADVANCED 0x00000002 82 83 #define RDECODE_SW_MODE_LINEAR 0x00000000 84 #define RDECODE_256B_S 0x00000001 85 #define RDECODE_256B_D 0x00000002 86 #define RDECODE_4KB_S 0x00000005 87 #define RDECODE_4KB_D 0x00000006 88 #define RDECODE_64KB_S 0x00000009 89 #define RDECODE_64KB_D 0x0000000A 90 #define RDECODE_4KB_S_X 0x00000015 91 #define RDECODE_4KB_D_X 0x00000016 92 #define RDECODE_64KB_S_X 0x00000019 93 #define RDECODE_64KB_D_X 0x0000001A 94 95 #define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000 96 #define RDECODE_MESSAGE_CREATE 0x00000001 97 #define RDECODE_MESSAGE_DECODE 0x00000002 98 #define RDECODE_MESSAGE_AVC 0x00000006 99 #define RDECODE_MESSAGE_VC1 0x00000007 100 #define RDECODE_MESSAGE_MPEG2_VLD 0x0000000A 101 #define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B 102 #define RDECODE_MESSAGE_HEVC 0x0000000D 103 104 #define RDECODE_FEEDBACK_PROFILING 0x00000001 105 106 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7 107 108 typedef struct rvcn_dec_message_index_s { 109 unsigned int message_id; 110 unsigned int offset; 111 unsigned int size; 112 unsigned int filled; 113 } rvcn_dec_message_index_t; 114 115 typedef struct rvcn_dec_message_header_s { 116 unsigned int header_size; 117 unsigned int total_size; 118 unsigned int num_buffers; 119 unsigned int msg_type; 120 unsigned int stream_handle; 121 unsigned int status_report_feedback_number; 122 123 rvcn_dec_message_index_t index[1]; 124 } rvcn_dec_message_header_t; 125 126 typedef struct rvcn_dec_message_create_s { 127 unsigned int stream_type; 128 unsigned int session_flags; 129 unsigned int width_in_samples; 130 unsigned int height_in_samples; 131 } rvcn_dec_message_create_t; 132 133 typedef struct rvcn_dec_message_decode_s { 134 unsigned int stream_type; 135 unsigned int decode_flags; 136 unsigned int width_in_samples; 137 unsigned int height_in_samples; 138 139 unsigned int bsd_size; 140 unsigned int dpb_size; 141 unsigned int dt_size; 142 unsigned int sct_size; 143 unsigned int sc_coeff_size; 144 unsigned int hw_ctxt_size; 145 unsigned int sw_ctxt_size; 146 unsigned int pic_param_size; 147 unsigned int mb_cntl_size; 148 unsigned int reserved0[4]; 149 unsigned int decode_buffer_flags; 150 151 unsigned int db_pitch; 152 unsigned int db_aligned_height; 153 unsigned int db_tiling_mode; 154 unsigned int db_swizzle_mode; 155 unsigned int db_array_mode; 156 unsigned int db_field_mode; 157 unsigned int db_surf_tile_config; 158 159 unsigned int dt_pitch; 160 unsigned int dt_uv_pitch; 161 unsigned int dt_tiling_mode; 162 unsigned int dt_swizzle_mode; 163 unsigned int dt_array_mode; 164 unsigned int dt_field_mode; 165 unsigned int dt_out_format; 166 unsigned int dt_surf_tile_config; 167 unsigned int dt_uv_surf_tile_config; 168 unsigned int dt_luma_top_offset; 169 unsigned int dt_luma_bottom_offset; 170 unsigned int dt_chroma_top_offset; 171 unsigned int dt_chroma_bottom_offset; 172 unsigned int dt_chromaV_top_offset; 173 unsigned int dt_chromaV_bottom_offset; 174 175 unsigned char dpbRefArraySlice[16]; 176 unsigned char dpbCurArraySlice; 177 unsigned char dpbReserved[3]; 178 } rvcn_dec_message_decode_t; 179 180 typedef struct { 181 unsigned short viewOrderIndex; 182 unsigned short viewId; 183 unsigned short numOfAnchorRefsInL0; 184 unsigned short viewIdOfAnchorRefsInL0[15]; 185 unsigned short numOfAnchorRefsInL1; 186 unsigned short viewIdOfAnchorRefsInL1[15]; 187 unsigned short numOfNonAnchorRefsInL0; 188 unsigned short viewIdOfNonAnchorRefsInL0[15]; 189 unsigned short numOfNonAnchorRefsInL1; 190 unsigned short viewIdOfNonAnchorRefsInL1[15]; 191 } radeon_mvcElement_t; 192 193 typedef struct rvcn_dec_message_avc_s { 194 unsigned int profile; 195 unsigned int level; 196 197 unsigned int sps_info_flags; 198 unsigned int pps_info_flags; 199 unsigned char chroma_format; 200 unsigned char bit_depth_luma_minus8; 201 unsigned char bit_depth_chroma_minus8; 202 unsigned char log2_max_frame_num_minus4; 203 204 unsigned char pic_order_cnt_type; 205 unsigned char log2_max_pic_order_cnt_lsb_minus4; 206 unsigned char num_ref_frames; 207 unsigned char reserved_8bit; 208 209 signed char pic_init_qp_minus26; 210 signed char pic_init_qs_minus26; 211 signed char chroma_qp_index_offset; 212 signed char second_chroma_qp_index_offset; 213 214 unsigned char num_slice_groups_minus1; 215 unsigned char slice_group_map_type; 216 unsigned char num_ref_idx_l0_active_minus1; 217 unsigned char num_ref_idx_l1_active_minus1; 218 219 unsigned short slice_group_change_rate_minus1; 220 unsigned short reserved_16bit_1; 221 222 unsigned char scaling_list_4x4[6][16]; 223 unsigned char scaling_list_8x8[2][64]; 224 225 unsigned int frame_num; 226 unsigned int frame_num_list[16]; 227 int curr_field_order_cnt_list[2]; 228 int field_order_cnt_list[16][2]; 229 230 unsigned int decoded_pic_idx; 231 unsigned int curr_pic_ref_frame_num; 232 unsigned char ref_frame_list[16]; 233 234 unsigned int reserved[122]; 235 236 struct { 237 unsigned int numViews; 238 unsigned int viewId0; 239 radeon_mvcElement_t mvcElements[1]; 240 } mvc; 241 242 } rvcn_dec_message_avc_t; 243 244 typedef struct rvcn_dec_message_vc1_s { 245 unsigned int profile; 246 unsigned int level; 247 unsigned int sps_info_flags; 248 unsigned int pps_info_flags; 249 unsigned int pic_structure; 250 unsigned int chroma_format; 251 unsigned short decoded_pic_idx; 252 unsigned short deblocked_pic_idx; 253 unsigned short forward_ref_idx; 254 unsigned short backward_ref_idx; 255 unsigned int cached_frame_flag; 256 } rvcn_dec_message_vc1_t; 257 258 typedef struct rvcn_dec_message_mpeg2_vld_s { 259 unsigned int decoded_pic_idx; 260 unsigned int forward_ref_pic_idx; 261 unsigned int backward_ref_pic_idx; 262 263 unsigned char load_intra_quantiser_matrix; 264 unsigned char load_nonintra_quantiser_matrix; 265 unsigned char reserved_quantiser_alignement[2]; 266 unsigned char intra_quantiser_matrix[64]; 267 unsigned char nonintra_quantiser_matrix[64]; 268 269 unsigned char profile_and_level_indication; 270 unsigned char chroma_format; 271 272 unsigned char picture_coding_type; 273 274 unsigned char reserved_1; 275 276 unsigned char f_code[2][2]; 277 unsigned char intra_dc_precision; 278 unsigned char pic_structure; 279 unsigned char top_field_first; 280 unsigned char frame_pred_frame_dct; 281 unsigned char concealment_motion_vectors; 282 unsigned char q_scale_type; 283 unsigned char intra_vlc_format; 284 unsigned char alternate_scan; 285 } rvcn_dec_message_mpeg2_vld_t; 286 287 typedef struct rvcn_dec_message_mpeg4_asp_vld_s { 288 unsigned int decoded_pic_idx; 289 unsigned int forward_ref_pic_idx; 290 unsigned int backward_ref_pic_idx; 291 292 unsigned int variant_type; 293 unsigned char profile_and_level_indication; 294 295 unsigned char video_object_layer_verid; 296 unsigned char video_object_layer_shape; 297 298 unsigned char reserved_1; 299 300 unsigned short video_object_layer_width; 301 unsigned short video_object_layer_height; 302 303 unsigned short vop_time_increment_resolution; 304 305 unsigned short reserved_2; 306 307 struct { 308 unsigned int short_video_header :1; 309 unsigned int obmc_disable :1; 310 unsigned int interlaced :1; 311 unsigned int load_intra_quant_mat :1; 312 unsigned int load_nonintra_quant_mat :1; 313 unsigned int quarter_sample :1; 314 unsigned int complexity_estimation_disable :1; 315 unsigned int resync_marker_disable :1; 316 unsigned int data_partitioned :1; 317 unsigned int reversible_vlc :1; 318 unsigned int newpred_enable :1; 319 unsigned int reduced_resolution_vop_enable :1; 320 unsigned int scalability :1; 321 unsigned int is_object_layer_identifier :1; 322 unsigned int fixed_vop_rate :1; 323 unsigned int newpred_segment_type :1; 324 unsigned int reserved_bits :16; 325 }; 326 327 unsigned char quant_type; 328 unsigned char reserved_3[3]; 329 unsigned char intra_quant_mat[64]; 330 unsigned char nonintra_quant_mat[64]; 331 332 struct { 333 unsigned char sprite_enable; 334 335 unsigned char reserved_4[3]; 336 337 unsigned short sprite_width; 338 unsigned short sprite_height; 339 short sprite_left_coordinate; 340 short sprite_top_coordinate; 341 342 unsigned char no_of_sprite_warping_points; 343 unsigned char sprite_warping_accuracy; 344 unsigned char sprite_brightness_change; 345 unsigned char low_latency_sprite_enable; 346 } sprite_config; 347 348 struct { 349 struct { 350 unsigned int check_skip :1; 351 unsigned int switch_rounding :1; 352 unsigned int t311 :1; 353 unsigned int reserved_bits :29; 354 }; 355 356 unsigned char vol_mode; 357 358 unsigned char reserved_5[3]; 359 } divx_311_config; 360 361 struct { 362 unsigned char vop_data_present; 363 unsigned char vop_coding_type; 364 unsigned char vop_quant; 365 unsigned char vop_coded; 366 unsigned char vop_rounding_type; 367 unsigned char intra_dc_vlc_thr; 368 unsigned char top_field_first; 369 unsigned char alternate_vertical_scan_flag; 370 unsigned char vop_fcode_forward; 371 unsigned char vop_fcode_backward; 372 unsigned int TRB[2]; 373 unsigned int TRD[2]; 374 } vop; 375 376 } rvcn_dec_message_mpeg4_asp_vld_t; 377 378 typedef struct rvcn_dec_message_hevc_s { 379 unsigned int sps_info_flags; 380 unsigned int pps_info_flags; 381 unsigned char chroma_format; 382 unsigned char bit_depth_luma_minus8; 383 unsigned char bit_depth_chroma_minus8; 384 unsigned char log2_max_pic_order_cnt_lsb_minus4; 385 386 unsigned char sps_max_dec_pic_buffering_minus1; 387 unsigned char log2_min_luma_coding_block_size_minus3; 388 unsigned char log2_diff_max_min_luma_coding_block_size; 389 unsigned char log2_min_transform_block_size_minus2; 390 391 unsigned char log2_diff_max_min_transform_block_size; 392 unsigned char max_transform_hierarchy_depth_inter; 393 unsigned char max_transform_hierarchy_depth_intra; 394 unsigned char pcm_sample_bit_depth_luma_minus1; 395 396 unsigned char pcm_sample_bit_depth_chroma_minus1; 397 unsigned char log2_min_pcm_luma_coding_block_size_minus3; 398 unsigned char log2_diff_max_min_pcm_luma_coding_block_size; 399 unsigned char num_extra_slice_header_bits; 400 401 unsigned char num_short_term_ref_pic_sets; 402 unsigned char num_long_term_ref_pic_sps; 403 unsigned char num_ref_idx_l0_default_active_minus1; 404 unsigned char num_ref_idx_l1_default_active_minus1; 405 406 signed char pps_cb_qp_offset; 407 signed char pps_cr_qp_offset; 408 signed char pps_beta_offset_div2; 409 signed char pps_tc_offset_div2; 410 411 unsigned char diff_cu_qp_delta_depth; 412 unsigned char num_tile_columns_minus1; 413 unsigned char num_tile_rows_minus1; 414 unsigned char log2_parallel_merge_level_minus2; 415 416 unsigned short column_width_minus1[19]; 417 unsigned short row_height_minus1[21]; 418 419 signed char init_qp_minus26; 420 unsigned char num_delta_pocs_ref_rps_idx; 421 unsigned char curr_idx; 422 unsigned char reserved[1]; 423 int curr_poc; 424 unsigned char ref_pic_list[16]; 425 int poc_list[16]; 426 unsigned char ref_pic_set_st_curr_before[8]; 427 unsigned char ref_pic_set_st_curr_after[8]; 428 unsigned char ref_pic_set_lt_curr[8]; 429 430 unsigned char ucScalingListDCCoefSizeID2[6]; 431 unsigned char ucScalingListDCCoefSizeID3[2]; 432 433 unsigned char highestTid; 434 unsigned char isNonRef; 435 436 unsigned char p010_mode; 437 unsigned char msb_mode; 438 unsigned char luma_10to8; 439 unsigned char chroma_10to8; 440 441 unsigned char hevc_reserved[2]; 442 443 unsigned char direct_reflist[2][15]; 444 } rvcn_dec_message_hevc_t; 445 446 typedef struct rvcn_dec_feature_index_s { 447 unsigned int feature_id; 448 unsigned int offset; 449 unsigned int size; 450 unsigned int filled; 451 } rvcn_dec_feature_index_t; 452 453 typedef struct rvcn_dec_feedback_header_s { 454 unsigned int header_size; 455 unsigned int total_size; 456 unsigned int num_buffers; 457 unsigned int status_report_feedback_number; 458 unsigned int status; 459 unsigned int value; 460 unsigned int errorBits; 461 rvcn_dec_feature_index_t index[1]; 462 } rvcn_dec_feedback_header_t; 463 464 typedef struct rvcn_dec_feedback_profiling_s { 465 unsigned int size; 466 467 unsigned int decodingTime; 468 unsigned int decodePlusOverhead; 469 unsigned int masterTimerHits; 470 unsigned int uvdLBSIREWaitCount; 471 472 unsigned int avgMPCMemLatency; 473 unsigned int maxMPCMemLatency; 474 unsigned int uvdMPCLumaHits; 475 unsigned int uvdMPCLumaHitPend; 476 unsigned int uvdMPCLumaSearch; 477 unsigned int uvdMPCChromaHits; 478 unsigned int uvdMPCChromaHitPend; 479 unsigned int uvdMPCChromaSearch; 480 481 unsigned int uvdLMIPerfCountLo; 482 unsigned int uvdLMIPerfCountHi; 483 unsigned int uvdLMIAvgLatCntrEnvHit; 484 unsigned int uvdLMILatCntr; 485 486 unsigned int frameCRC0; 487 unsigned int frameCRC1; 488 unsigned int frameCRC2; 489 unsigned int frameCRC3; 490 491 unsigned int uvdLMIPerfMonCtrl; 492 unsigned int uvdLMILatCtrl; 493 unsigned int uvdMPCCntl; 494 unsigned int reserved0[4]; 495 unsigned int decoderID; 496 unsigned int codec; 497 498 unsigned int dmaHwCrc32Enable; 499 unsigned int dmaHwCrc32Value; 500 unsigned int dmaHwCrc32Value2; 501 } rvcn_dec_feedback_profiling_t; 502 503 struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context, 504 const struct pipe_video_codec *templat); 505 506 #endif 507