Searched refs:REGLIST4 (Results 1 – 3 of 3) sorted by relevance
/external/swiftshader/third_party/subzero/src/ |
D | IceRegistersARM32.def | 72 X(Reg_d0, 0, "d0", 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d0, q0, s0, s1)) \ 73 X(Reg_d1, 1, "d1", 2, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d1, q0, s2, s3)) \ 74 X(Reg_d2, 2, "d2", 3, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d2, q1, s4, s5)) \ 75 X(Reg_d3, 3, "d3", 4, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d3, q1, s6, s7)) \ 76 X(Reg_d4, 4, "d4", 5, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d4, q2, s8, s9)) \ 77 X(Reg_d5, 5, "d5", 6, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d5, q2, s10, s11)) \ 78 X(Reg_d6, 6, "d6", 7, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d6, q3, s12, s13)) \ 79 X(Reg_d7, 7, "d7", 8, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d7, q3, s14, s15)) \ 80 X(Reg_d8, 8, "d8", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d8, q4, s16, s17)) \ 81 X(Reg_d9, 9, "d9", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d9, q4, s18, s19)) \ [all …]
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D | IceInstX8664.def | 110 REGLIST4(RegX8664, eax, ax, al, ah)) \ 112 REGLIST4(RegX8664, ecx, cx, cl, ch)) \ 114 REGLIST4(RegX8664, edx, dx, dl, dh)) \ 128 REGLIST4(RegX8664, ebx, bx, bl, bh)) \ 143 REGLIST4(RegX8664, rax, ax, al, ah)) \ 145 REGLIST4(RegX8664, rcx, cx, cl, ch)) \ 147 REGLIST4(RegX8664, rdx, dx, dl, dh)) \ 161 REGLIST4(RegX8664, rbx, bx, bl, bh)) \ 176 REGLIST4(RegX8664, rax, eax, al, ah)) \ 178 REGLIST4(RegX8664, rcx, ecx, cl, ch)) \ [all …]
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D | IceRegList.h | 30 #define REGLIST4(ns, r0, r1, r2, r3) \ macro
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