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Searched refs:REG_A5XX_GRAS_SU_LAYERED (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_emit.c968 OUT_PKT4(ring, REG_A5XX_GRAS_SU_LAYERED, 1); in fd5_emit_restore()
Da5xx.xml.h2764 #define REG_A5XX_GRAS_SU_LAYERED 0x0000e093 macro