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Searched refs:REG_DDR3_MR0_CL_OFFS (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_axp.h255 #define REG_DDR3_MR0_CL_OFFS 2 macro
Dddr3_dfs.c474 reg |= ((tmp & 0x1) << REG_DDR3_MR0_CL_OFFS); in ddr3_dfs_high_2_low()
1172 reg |= ((tmp & 0x1) << REG_DDR3_MR0_CL_OFFS); in ddr3_dfs_low_2_high()