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Searched refs:REG_DDR3_MR1_OUTBUF_WL_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_write_leveling.c746 REG_DDR3_MR1_OUTBUF_WL_MASK; in ddr3_write_leveling_sw()
802 REG_DDR3_MR1_OUTBUF_WL_MASK; in ddr3_write_leveling_sw()
840 reg &= REG_DDR3_MR1_OUTBUF_WL_MASK; in ddr3_write_leveling_sw()
983 REG_DDR3_MR1_OUTBUF_WL_MASK; in ddr3_write_leveling_sw_reg_dimm()
1034 REG_DDR3_MR1_OUTBUF_WL_MASK; in ddr3_write_leveling_sw_reg_dimm()
1072 reg &= REG_DDR3_MR1_OUTBUF_WL_MASK; in ddr3_write_leveling_sw_reg_dimm()
Dddr3_axp.h269 #define REG_DDR3_MR1_OUTBUF_WL_MASK 0xFFFFEF7F /* WL-disabled,OB-enabled */ macro