Searched refs:REG_DDR3_MR2_CWL_OFFS (Results 1 – 4 of 4) sorted by relevance
482 & ~(REG_DDR3_MR2_CWL_MASK << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_high_2_low()484 reg |= ((0x1) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_high_2_low()1180 ~(REG_DDR3_MR2_CWL_MASK << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()1182 reg |= ((0) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()1184 reg |= ((dram_info->cwl) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()1496 reg |= dram_info->cwl << REG_DDR3_MR2_CWL_OFFS; in ddr3_dfs_low_2_high()
277 #define REG_DDR3_MR2_CWL_OFFS 3 macro
139 reg = reg_read(REG_DDR3_MR2_ADDR) >> REG_DDR3_MR2_CWL_OFFS; in ddr3_hw_training()141 reg = reg_read(REG_DDR3_MR2_CS_ADDR) >> REG_DDR3_MR2_CWL_OFFS; in ddr3_hw_training()
1109 reg = ((cwl - 5) << REG_DDR3_MR2_CWL_OFFS);