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Searched refs:REG_DDR3_RANK_CTRL_CS_ENA_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_axp.h284 #define REG_DDR3_RANK_CTRL_CS_ENA_MASK 0xF macro
Dddr3_init.c1094 REG_DDR3_RANK_CTRL_CS_ENA_MASK; in ddr3_get_cs_ena_from_reg()