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Searched refs:REG_DFS_CWL_NEXT_STATE_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_dfs.c363 reg &= ~(REG_DFS_CWL_NEXT_STATE_MASK << REG_DFS_CWL_NEXT_STATE_OFFS); in ddr3_dfs_high_2_low()
979 reg &= ~(REG_DFS_CWL_NEXT_STATE_MASK << REG_DFS_CWL_NEXT_STATE_OFFS); in ddr3_dfs_low_2_high()
994 reg |= (((0) & REG_DFS_CWL_NEXT_STATE_MASK) << in ddr3_dfs_low_2_high()
998 reg |= (((dram_info->cwl) & REG_DFS_CWL_NEXT_STATE_MASK) << in ddr3_dfs_low_2_high()
Dddr3_axp.h196 #define REG_DFS_CWL_NEXT_STATE_MASK 0x7 macro