Home
last modified time | relevance | path

Searched refs:REG_DRAM_TRAINING_1_ADDR (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_dqs.c198 reg = reg_read(REG_DRAM_TRAINING_1_ADDR) | in ddr3_dqs_centralization_rx()
200 reg_write(REG_DRAM_TRAINING_1_ADDR, reg); in ddr3_dqs_centralization_rx()
278 reg = reg_read(REG_DRAM_TRAINING_1_ADDR) | in ddr3_dqs_centralization_tx()
280 reg_write(REG_DRAM_TRAINING_1_ADDR, reg); in ddr3_dqs_centralization_tx()
Dddr3_pbs.c386 reg = reg_read(REG_DRAM_TRAINING_1_ADDR) | in ddr3_pbs_tx()
388 reg_write(REG_DRAM_TRAINING_1_ADDR, reg); in ddr3_pbs_tx()
898 reg = reg_read(REG_DRAM_TRAINING_1_ADDR) | in ddr3_pbs_rx()
900 reg_write(REG_DRAM_TRAINING_1_ADDR, reg); in ddr3_pbs_rx()
Dddr3_axp.h228 #define REG_DRAM_TRAINING_1_ADDR 0x15B4 macro
Dddr3_hw_training.c648 reg = reg_read(REG_DRAM_TRAINING_1_ADDR) | in ddr3_load_patterns()
650 reg_write(REG_DRAM_TRAINING_1_ADDR, reg); in ddr3_load_patterns()
Dddr3_write_leveling.c455 reg = reg_read(REG_DRAM_TRAINING_1_ADDR) | in ddr3_wl_supplement()
457 reg_write(REG_DRAM_TRAINING_1_ADDR, reg); in ddr3_wl_supplement()