Searched refs:REG_DRAM_TRAINING_2_ECC_MUX_OFFS (Results 1 – 5 of 5) sorted by relevance
159 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()161 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()188 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()239 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_tx()241 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_tx()268 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_tx()
160 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_tx()162 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_tx()286 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_tx()602 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_rx()604 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_rx()799 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_rx()
253 REG_DRAM_TRAINING_2_ECC_MUX_OFFS)); in ddr3_wl_supplement()257 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_wl_supplement()402 REG_DRAM_TRAINING_2_ECC_MUX_OFFS)); in ddr3_wl_supplement()
208 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw()210 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw()310 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw()
236 #define REG_DRAM_TRAINING_2_ECC_MUX_OFFS 1 macro