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Searched refs:REG_DRAM_TRAINING_PATTERN_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_hw_training.c654 reg_write(REG_DRAM_TRAINING_PATTERN_BASE_ADDR, 0); in ddr3_load_patterns()
657 reg_write(REG_DRAM_TRAINING_PATTERN_BASE_ADDR, 0); in ddr3_load_patterns()
659 reg_write(REG_DRAM_TRAINING_PATTERN_BASE_ADDR, in ddr3_load_patterns()
Dddr3_axp.h239 #define REG_DRAM_TRAINING_PATTERN_BASE_ADDR 0x15BC macro