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Searched refs:REG_DRAM_TRAINING_RETEST_OFFS (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_axp.h218 #define REG_DRAM_TRAINING_RETEST_OFFS 24 macro
Dddr3_write_leveling.c85 reg |= (COUNT_HW_WL << REG_DRAM_TRAINING_RETEST_OFFS); in ddr3_write_leveling_hw()
508 reg |= (COUNT_HW_WL << REG_DRAM_TRAINING_RETEST_OFFS); in ddr3_write_leveling_hw_reg_dimm()
Dddr3_read_leveling.c71 reg |= (COUNT_HW_RL << REG_DRAM_TRAINING_RETEST_OFFS); in ddr3_read_leveling_hw()