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Searched refs:REG_METAL_MASK_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_dfs.c141 reg = reg_read(REG_METAL_MASK_ADDR); in ddr3_dfs_high_2_low()
145 dfs_reg_write(REG_METAL_MASK_ADDR, reg); in ddr3_dfs_high_2_low()
461 reg = reg_read(REG_METAL_MASK_ADDR); in ddr3_dfs_high_2_low()
465 dfs_reg_write(REG_METAL_MASK_ADDR, reg); in ddr3_dfs_high_2_low()
529 reg = reg_read(REG_METAL_MASK_ADDR) & ~(1 << 0); /* [0] - disable */ in ddr3_dfs_high_2_low()
531 dfs_reg_write(REG_METAL_MASK_ADDR, reg); in ddr3_dfs_high_2_low()
739 reg = (reg_read(REG_METAL_MASK_ADDR) | (1 << 0)); in ddr3_dfs_high_2_low()
742 dfs_reg_write(REG_METAL_MASK_ADDR, reg); in ddr3_dfs_high_2_low()
797 reg = reg_read(REG_METAL_MASK_ADDR); in ddr3_dfs_low_2_high()
801 dfs_reg_write(REG_METAL_MASK_ADDR, reg); in ddr3_dfs_low_2_high()
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Dddr3_axp.h170 #define REG_METAL_MASK_ADDR 0x14B0 macro