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Searched refs:REG_PHY_LOCK_APLL_ADLL_STATUS_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_dfs.c373 REG_PHY_LOCK_APLL_ADLL_STATUS_MASK; in ddr3_dfs_high_2_low()
375 } while (reg != REG_PHY_LOCK_APLL_ADLL_STATUS_MASK); in ddr3_dfs_high_2_low()
1030 REG_PHY_LOCK_APLL_ADLL_STATUS_MASK; in ddr3_dfs_low_2_high()
1032 } while (reg != REG_PHY_LOCK_APLL_ADLL_STATUS_MASK); in ddr3_dfs_low_2_high()
Dddr3_axp.h301 #define REG_PHY_LOCK_APLL_ADLL_STATUS_MASK 0x7FF macro