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Searched refs:REG_PHY_LOCK_MASK_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_dfs.c518 reg &= REG_PHY_LOCK_MASK_MASK; /* [11:0] = 0 */ in ddr3_dfs_high_2_low()
555 reg = (reg_read(REG_PHY_LOCK_MASK_ADDR) & REG_PHY_LOCK_MASK_MASK); in ddr3_dfs_high_2_low()
751 reg |= ~REG_PHY_LOCK_MASK_MASK; /* [11:0] = FFF */ in ddr3_dfs_high_2_low()
1218 reg &= REG_PHY_LOCK_MASK_MASK; /* [11:0] = 0 */ in ddr3_dfs_low_2_high()
1540 reg |= ~REG_PHY_LOCK_MASK_MASK; /* [11:0] = FFF */ in ddr3_dfs_low_2_high()
Dddr3_axp.h296 #define REG_PHY_LOCK_MASK_MASK 0xFFFFF000 macro