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Searched refs:REG_READ_DATA_SAMPLE_DELAYS_OFFS (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_read_leveling.c221 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
223 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
618 << (REG_READ_DATA_SAMPLE_DELAYS_OFFS in ddr3_read_leveling_single_cs_rl_mode()
621 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * in ddr3_read_leveling_single_cs_rl_mode()
1023 (REG_READ_DATA_SAMPLE_DELAYS_OFFS in ddr3_read_leveling_single_cs_window_mode()
1026 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * in ddr3_read_leveling_single_cs_window_mode()
Dddr3_dfs.c709 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
710 reg |= (5 << (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
1509 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1511 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1519 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
Dddr3_axp.h200 #define REG_READ_DATA_SAMPLE_DELAYS_OFFS 8 macro
Dddr3_spd.c1038 reg |= (cl << (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs));