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Searched refs:REG_SIZE (Results 1 – 25 of 37) sorted by relevance

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/external/libffi/src/tile/
Dtile.S32 #define REG_SIZE FFI_SIZEOF_ARG macro
41 #define LINKAGE_SIZE (2 * REG_SIZE)
97 addi TMP, sp, -REG_SIZE
101 REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7
107 addi TMP2, sp, -(REG_SIZE * 2)
112 .cfi_offset r52, -REG_SIZE
121 addi TMP, sp, REG_SIZE
140 addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE
145 addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE
146 addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/tile/
Dtile.S32 #define REG_SIZE FFI_SIZEOF_ARG macro
41 #define LINKAGE_SIZE (2 * REG_SIZE)
97 addi TMP, sp, -REG_SIZE
101 REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7
107 addi TMP2, sp, -(REG_SIZE * 2)
112 .cfi_offset r52, -REG_SIZE
121 addi TMP, sp, REG_SIZE
140 addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE
145 addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE
146 addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE
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/external/mesa3d/src/intel/compiler/
Dbrw_fs_register_coalesce.cpp56 dst.offset += (i < inst->header_size ? REG_SIZE : in is_nop_mov()
199 const int offset = inst->src[0].offset / REG_SIZE; in register_coalesce()
210 for (unsigned i = 0; i < MAX2(inst->size_written / REG_SIZE, 1); i++) in register_coalesce()
211 dst_reg_offset[offset + i] = inst->dst.offset / REG_SIZE + i; in register_coalesce()
259 scan_inst->dst.offset = scan_inst->dst.offset % REG_SIZE + in register_coalesce()
260 dst_reg_offset[scan_inst->dst.offset / REG_SIZE] * REG_SIZE; in register_coalesce()
267 scan_inst->src[j].offset = scan_inst->src[j].offset % REG_SIZE + in register_coalesce()
268 dst_reg_offset[scan_inst->src[j].offset / REG_SIZE] * REG_SIZE; in register_coalesce()
Dbrw_ir_vec4.h78 reg->nr += suboffset / REG_SIZE; in add_byte_offset()
79 reg->offset = suboffset % REG_SIZE; in add_byte_offset()
86 reg->nr += suboffset / REG_SIZE; in add_byte_offset()
87 reg->subnr = suboffset % REG_SIZE; in add_byte_offset()
234 (r.file == UNIFORM ? 16 : REG_SIZE) + r.offset + in reg_offset()
254 t1.offset += 4 * REG_SIZE; in regions_overlap()
416 return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + inst->size_written, in regs_written()
417 REG_SIZE); in regs_written()
430 inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 16 : REG_SIZE; in regs_read()
Dbrw_ir_fs.h84 reg.nr += suboffset / REG_SIZE; in byte_offset()
85 reg.offset = suboffset % REG_SIZE; in byte_offset()
91 reg.nr += suboffset / REG_SIZE; in byte_offset()
92 reg.subnr = suboffset % REG_SIZE; in byte_offset()
183 (r.file == UNIFORM ? 4 : REG_SIZE) + r.offset + in reg_offset()
216 regions_overlap(byte_offset(t, 4 * REG_SIZE), dr / 2, s, ds); in regions_overlap()
426 return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + in regs_written()
429 REG_SIZE); in regs_written()
442 inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 4 : REG_SIZE; in regs_read()
Dbrw_fs_reg_allocate.cpp39 reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE; in assign_reg()
40 reg->offset %= REG_SIZE; in assign_reg()
759 REG_SIZE; in emit_unspill()
771 spill_offset < (1 << 12) * REG_SIZE); in emit_unspill()
783 dst.offset += reg_size * REG_SIZE; in emit_unspill()
784 spill_offset += reg_size * REG_SIZE; in emit_unspill()
793 REG_SIZE; in emit_spill()
799 src.offset += reg_size * REG_SIZE; in emit_spill()
800 spill_inst->offset = spill_offset + i * reg_size * REG_SIZE; in emit_spill()
902 last_scratch += size * REG_SIZE; in spill_reg()
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Dbrw_vec4_copy_propagation.cpp49 inst->dst.offset % REG_SIZE == 0 && in is_direct_copy()
76 return regions_overlap(*src, REG_SIZE, inst->dst, inst->size_written) && in is_channel_updated()
340 if (devinfo->gen < 8 && inst->size_written > REG_SIZE && is_uniform(value)) in try_copy_propagate()
366 if (inst->src[arg].offset % REG_SIZE || value.offset % REG_SIZE) in try_copy_propagate()
510 if (inst->size_read(i) != REG_SIZE || in opt_copy_propagation()
511 inst->src[i].offset % REG_SIZE) in opt_copy_propagation()
515 inst->src[i].offset / REG_SIZE); in opt_copy_propagation()
527 alloc.offsets[inst->dst.nr] + inst->dst.offset / REG_SIZE; in opt_copy_propagation()
Dbrw_fs_validate.cpp46 fsv_assert(inst->dst.offset / REG_SIZE + regs_written(inst) <= in validate()
52 fsv_assert(inst->src[i].offset / REG_SIZE + regs_read(inst, i) <= in validate()
Dbrw_vec4.cpp205 return size_written > REG_SIZE; in has_source_and_destination_hazard()
222 return mlen * REG_SIZE; in size_read()
226 return mlen * REG_SIZE; in size_read()
1069 int reg = inst->src[i].nr + inst->src[i].offset / REG_SIZE; in opt_set_dependency_control()
1088 int reg = inst->dst.nr + inst->dst.offset / REG_SIZE; in opt_set_dependency_control()
1519 inst->dst.offset / REG_SIZE != 0) { in split_virtual_grfs()
1521 inst->dst.offset / REG_SIZE - 1); in split_virtual_grfs()
1522 inst->dst.offset %= REG_SIZE; in split_virtual_grfs()
1526 inst->src[i].offset / REG_SIZE != 0) { in split_virtual_grfs()
1528 inst->src[i].offset / REG_SIZE - 1); in split_virtual_grfs()
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Dbrw_fs_generator.cpp77 const unsigned reg_width = REG_SIZE / (reg->stride * type_sz(reg->type)); in brw_reg_from_fs_reg()
426 assert(inst->size_written % REG_SIZE == 0); in generate_fb_read()
432 inst->header_size, inst->size_written / REG_SIZE, in generate_fb_read()
449 unsigned imm_byte_offset = reg.nr * REG_SIZE + reg.subnr; in generate_mov_indirect()
454 reg.nr = imm_byte_offset / REG_SIZE; in generate_mov_indirect()
455 reg.subnr = imm_byte_offset % REG_SIZE; in generate_mov_indirect()
548 assert(inst->size_written % REG_SIZE == 0); in generate_urb_read()
564 brw_inst_set_rlen(p->devinfo, send, inst->size_written / REG_SIZE); in generate_urb_read()
735 assert(inst->size_written % REG_SIZE == 0); in generate_tex()
992 inst->size_written / REG_SIZE, in generate_tex()
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Dbrw_fs.cpp360 if (grf_alloc.sizes[reg.nr] * REG_SIZE != this->size_written) in is_copy_payload()
369 reg.offset += REG_SIZE; in is_copy_payload()
674 this->dst.offset % REG_SIZE != 0); in is_partial_write()
825 return mlen * REG_SIZE; in size_read()
831 return mlen * REG_SIZE; in size_read()
841 return REG_SIZE; in size_read()
846 return REG_SIZE; in size_read()
857 return mlen * REG_SIZE; in size_read()
1607 inst->src[i].offset / REG_SIZE; in convert_attr_sources_to_hw_regs()
1622 assert(total_size <= 2 * REG_SIZE); in convert_attr_sources_to_hw_regs()
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Dbrw_fs_saturate_propagation.cpp126 scan_inst->src[i].offset / REG_SIZE == in opt_saturate_propagation_local()
127 inst->src[0].offset / REG_SIZE) { in opt_saturate_propagation_local()
Dbrw_fs_bank_conflicts.cpp499 return r.nr + r.offset / REG_SIZE; in reg_of()
501 return reg_offset(r) / REG_SIZE; in reg_of()
641 REG_SIZE); in shader_conflict_weight_matrix()
881 r.offset = r.offset % REG_SIZE; in transform()
930 return DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE); in bank_conflict_cycles()
Dbrw_vec4_reg_allocate.cpp36 reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE; in assign()
37 reg->offset %= REG_SIZE; in assign()
410 inst->src[i].offset >= REG_SIZE) in evaluate_spill_costs()
438 if (inst->dst.reladdr || inst->dst.offset >= REG_SIZE) in evaluate_spill_costs()
Dbrw_reg.h208 #define REG_SIZE (8*4) macro
528 unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes; in byte_offset()
529 reg.nr = newoffset / REG_SIZE; in byte_offset()
530 reg.subnr = newoffset % REG_SIZE; in byte_offset()
700 return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); in brw_address()
Dbrw_vec4_visitor.cpp792 dst_reg index_reg = retype(byte_offset(dst_reg(header), REG_SIZE), in emit_pull_constant_load_reg()
1476 assert(orig_src.offset % REG_SIZE == 0); in emit_scratch_read()
1477 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read()
1489 SCRATCH_READ(byte_offset(shuffled_float, REG_SIZE), index); in emit_scratch_read()
1505 assert(inst->dst.offset % REG_SIZE == 0); in emit_scratch_write()
1506 int reg_offset = base_offset + inst->dst.offset / REG_SIZE; in emit_scratch_write()
1566 SCRATCH_WRITE(dst, byte_offset(shuffled_float, REG_SIZE), index); in emit_scratch_write()
1577 inst->dst.offset %= REG_SIZE; in emit_scratch_write()
1608 src.offset %= REG_SIZE; in emit_resolve_reladdr()
1738 emit_pull_constant_load_reg(byte_offset(temp, i * REG_SIZE), in emit_pull_constant_load()
Dbrw_fs_builder.h192 REG_SIZE)),
571 inst->size_written = header_size * REG_SIZE; in LOAD_PAYLOAD()
575 REG_SIZE); in LOAD_PAYLOAD()
Dbrw_vec4_tcs.cpp233 inst = emit(MOV(byte_offset(dst_reg(retype(message, value.type)), REG_SIZE), in emit_urb_write()
282 emit_input_urb_read(byte_offset(tmp_d, REG_SIZE), vertex_index, in nir_emit_intrinsic()
353 shuffled_float = byte_offset(shuffled_float, REG_SIZE); in nir_emit_intrinsic()
Dbrw_fs_live_variables.h86 return var_from_vgrf[reg.nr] + reg.offset / REG_SIZE; in var_from_reg()
Dbrw_vec4_nir.cpp444 output_reg[varying + 1][c] = byte_offset(dst_reg(src), REG_SIZE); in nir_emit_intrinsic()
571 val_reg = byte_offset(val_reg, REG_SIZE); in nir_emit_intrinsic()
700 emit(MOV(dst_reg(retype(byte_offset(shuffled, REG_SIZE), temp.type)), in nir_emit_intrinsic()
867 emit_pull_constant_load_reg(dst_reg(byte_offset(temp_float, REG_SIZE)), in nir_emit_intrinsic()
894 ->size_written = 2 * REG_SIZE; in nir_emit_intrinsic()
2263 assert(!regions_overlap(dst, 2 * REG_SIZE, src, 2 * REG_SIZE)); in shuffle_64bit_data()
2283 swizzle(byte_offset(src, REG_SIZE), BRW_SWIZZLE_XYXY)); in shuffle_64bit_data()
2287 .MOV(writemask(byte_offset(dst, REG_SIZE), WRITEMASK_XY), in shuffle_64bit_data()
2292 .MOV(writemask(byte_offset(dst, REG_SIZE), WRITEMASK_ZW), in shuffle_64bit_data()
2293 byte_offset(src, REG_SIZE)); in shuffle_64bit_data()
Dbrw_fs_live_variables.cpp125 reg.offset += REG_SIZE; in setup_def_use()
136 reg.offset += REG_SIZE; in setup_def_use()
Dbrw_vec4_gs_visitor.cpp61 unsigned width = REG_SIZE / 2 / MAX2(4, type_sz(type)); in attribute_to_hw_reg()
105 assert(inst->src[i].offset % REG_SIZE == 0); in setup_varying_inputs()
107 inst->src[i].nr + inst->src[i].offset / REG_SIZE; in setup_varying_inputs()
Dbrw_fs_cse.cpp204 DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE); in create_copy_instr()
224 src.offset += REG_SIZE; in create_copy_instr()
/external/lzma/Asm/x86/
D7zAsm.asm39 REG_SIZE equ 8 define
42 REG_SIZE equ 4 define
D7zCrcOpt.asm15 data_size equ (REG_SIZE * 5)
16 crc_table equ (REG_SIZE + data_size)

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