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Searched refs:REG_TRAINING_DEBUG_3_MASK (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_init.c513 reg &= ~(REG_TRAINING_DEBUG_3_MASK); in ddr3_init_main()
515 reg &= ~(REG_TRAINING_DEBUG_3_MASK << REG_TRAINING_DEBUG_3_OFFS); in ddr3_init_main()
517 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (3 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init_main()
519 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (4 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init_main()
521 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (5 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init_main()
Dddr3_axp.h248 #define REG_TRAINING_DEBUG_3_MASK 0x7 macro
Dddr3_read_leveling.c663 add &= REG_TRAINING_DEBUG_3_MASK; in ddr3_read_leveling_single_cs_rl_mode()
719 add &= REG_TRAINING_DEBUG_3_MASK; in ddr3_read_leveling_single_cs_rl_mode()