Searched refs:REG_Y (Results 1 – 7 of 7) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/ |
D | overflt.ll | 21 ; CHECK: lw $[[REG_Y:[0-9]+]], 0($[[REG_Y_GOT]]) 24 ; CHECK: addu $[[REG_Y_IDX:[0-9]+]], $[[REG_IDX]], $[[REG_Y]] 40 ; CHECK-DAG: lw $[[REG_Y:[0-9]+]], 0($[[REG_Y_GOT]]) 43 ; CHECK-DAG: addu $[[REG_Y_IDX:[0-9]+]], $[[REG_IDX]], $[[REG_Y]]
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/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
D | overflt.ll | 21 ; CHECK: lw $[[REG_Y:[0-9]+]], 0($[[REG_Y_GOT]]) 24 ; CHECK: addu $[[REG_Y_IDX:[0-9]+]], $[[REG_IDX]], $[[REG_Y]] 40 ; CHECK-DAG: lw $[[REG_Y:[0-9]+]], 0($[[REG_Y_GOT]]) 43 ; CHECK-DAG: addu $[[REG_Y_IDX:[0-9]+]], $[[REG_IDX]], $[[REG_Y]]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | ds_read2_superreg.ll | 39 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}} 42 ; CI-DAG: v_add_f32_e32 v[[ADD1:[0-9]+]], v[[REG_Y]], v[[REG_W]] 65 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}} 68 ; CI-DAG: v_add_f32_e32 v[[ADD1:[0-9]+]], v[[ADD0]], v[[REG_Y]]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | ds_read2_superreg.ll | 39 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}} 42 ; CI-DAG: v_add_f32_e32 v[[ADD1:[0-9]+]], v[[REG_W]], v[[REG_Y]] 65 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}} 68 ; CI-DAG: v_add_f32_e32 v[[ADD1:[0-9]+]], v[[REG_Y]], v[[ADD0]]
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/external/google-breakpad/src/client/solaris/handler/ |
D | minidump_generator.cc | 162 context->y = (unsigned int)(regs[REG_Y]); in WriteContext()
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/external/python/cpython2/Lib/plat-sunos5/ |
D | IN.py | 604 REG_Y = (3) variable
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D | STROPTS.py | 601 REG_Y = (3) variable
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