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Searched refs:RESUME_RL_PATTERNS_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_axp.h48 #define RESUME_RL_PATTERNS_ADDR (0xFE0000) macro
50 #define RESUME_TRAINING_VALUES_ADDR (RESUME_RL_PATTERNS_ADDR + RESUME_RL_PATTERNS_SIZE)
52 #define BOOT_INFO_ADDR (RESUME_RL_PATTERNS_ADDR + 0x1000)
Dddr3_hw_training.c660 RESUME_RL_PATTERNS_ADDR); in ddr3_load_patterns()
958 mv_xor_mem_init(0, RESUME_RL_PATTERNS_ADDR, in ddr3_training_suspend_resume()