Searched refs:RExtOp0 (Results 1 – 3 of 3) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 3013 SDValue RExtOp0 = RHSShiftAmt.getOperand(0); in MatchRotate() local
3014 if (RExtOp0.getOpcode() == ISD::SUB && in MatchRotate()
3015 RExtOp0.getOperand(1) == LExtOp0) { in MatchRotate()
3021 dyn_cast<ConstantSDNode>(RExtOp0.getOperand(0))) { in MatchRotate()
3029 RExtOp0 == LExtOp0.getOperand(1)) { in MatchRotate()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 4101 SDValue RExtOp0 = RHSShiftAmt; in MatchRotate() local
4111 RExtOp0 = RHSShiftAmt.getOperand(0); in MatchRotate()
4115 LExtOp0, RExtOp0, ISD::ROTL, ISD::ROTR, DL); in MatchRotate()
4120 RExtOp0, LExtOp0, ISD::ROTR, ISD::ROTL, DL); in MatchRotate()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 5557 SDValue RExtOp0 = RHSShiftAmt; in MatchRotate() local
5567 RExtOp0 = RHSShiftAmt.getOperand(0); in MatchRotate()
5571 LExtOp0, RExtOp0, ISD::ROTL, ISD::ROTR, DL); in MatchRotate()
5576 RExtOp0, LExtOp0, ISD::ROTR, ISD::ROTL, DL); in MatchRotate()
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