/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | misched-fusion-addr.ll | 28 ; CHECK: adrp [[RH:x[0-9]+]], var_16bit 29 ; CHECK-NEXT: strh {{w[0-9]+}}, {{\[}}[[RH]], {{#?}}:lo12:var_16bit{{\]}} 41 ; CHECK: adrp [[RH:x[0-9]+]], var_16bit 42 ; CHECK-NEXT: ldrh {{w[0-9]+}}, {{\[}}[[RH]], {{#?}}:lo12:var_16bit{{\]}} 82 ; CHECK: adrp [[RH:x[0-9]+]], var_half 83 ; CHECK-NEXT: ldr {{h[0-9]+}}, {{\[}}[[RH]], {{#?}}:lo12:var_half{{\]}}
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/external/llvm/test/CodeGen/Generic/ |
D | i128-addsub.ll | 3 define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 18 store i64 %tmp2122, i64* %RH 22 define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 37 store i64 %tmp2122, i64* %RH
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Generic/ |
D | i128-addsub.ll | 3 define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 18 store i64 %tmp2122, i64* %RH 22 define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 37 store i64 %tmp2122, i64* %RH
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/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/ |
D | i128-addsub.ll | 3 define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 18 store i64 %tmp2122, i64* %RH 22 define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 37 store i64 %tmp2122, i64* %RH
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/external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/ |
D | addsub-i128.ll | 6 define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 21 store i64 %tmp2122, i64* %RH 25 define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 40 store i64 %tmp2122, i64* %RH
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypesGeneric.cpp | 520 SDValue Lo, Hi, LL, LH, RL, RH; in SplitVSETCC() local 522 std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1); in SplitVSETCC() 525 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); in SplitVSETCC() 531 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local 534 GetSplitOp(N->getOperand(2), RL, RH); in SplitRes_SELECT() 555 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); in SplitRes_SELECT() 560 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local 563 GetSplitOp(N->getOperand(3), RL, RH); in SplitRes_SELECT_CC() 568 N->getOperand(1), LH, RH, N->getOperand(4)); in SplitRes_SELECT_CC()
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D | TargetLowering.cpp | 3619 SDValue LH, SDValue RL, SDValue RH) const { in expandMUL_LOHI() 3641 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) || in expandMUL_LOHI() 3642 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode())); in expandMUL_LOHI() 3708 if (!LH.getNode() && !RH.getNode() && in expandMUL_LOHI() 3713 RH = DAG.getNode(ISD::SRL, dl, VT, RHS, Shift); in expandMUL_LOHI() 3714 RH = DAG.getNode(ISD::TRUNCATE, dl, HiLoVT, RH); in expandMUL_LOHI() 3726 RH = DAG.getNode(ISD::MUL, dl, HiLoVT, LL, RH); in expandMUL_LOHI() 3728 Hi = DAG.getNode(ISD::ADD, dl, HiLoVT, Hi, RH); in expandMUL_LOHI() 3743 if (!MakeMUL_LOHI(LL, RH, Lo, Hi, false)) in expandMUL_LOHI() 3760 if (!MakeMUL_LOHI(LH, RH, Lo, Hi, Opcode == ISD::SMUL_LOHI)) in expandMUL_LOHI() [all …]
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/external/llvm/test/CodeGen/Hexagon/ |
D | sube.ll | 12 define void @check_sube_subc(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 27 store i64 %tmp2122, i64* %RH
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D | adde.ll | 17 define void @check_adde_addc (i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { 32 store i64 %tmp2122, i64* %RH
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/external/epid-sdk/ext/ipp/sources/ippcp/ |
D | pcpbnuimpl.h | 139 #define MUL_AB(RH, RL, A, B) \ argument 156 (RH) = __x3 + HI_CHUNK(__x1); \
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/external/strace/ |
D | ChangeLog-CVS | 296 Fixes RH#471169 "format fcntl64() system calls for 361 Fixes RH#472053. 399 Fixes RH#470529. 463 Fixes RH#105371. 552 Fixes RH#455078. 571 Fixes RH#457291. 620 Fixes RH#448628. 634 Fixes RH#448629. 638 Fixes RH#455821. 682 Fixes RH#453438. [all …]
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypesGeneric.cpp | 442 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local 445 GetSplitOp(N->getOperand(2), RL, RH); in SplitRes_SELECT() 461 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); in SplitRes_SELECT() 466 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local 469 GetSplitOp(N->getOperand(3), RL, RH); in SplitRes_SELECT_CC() 474 N->getOperand(1), LH, RH, N->getOperand(4)); in SplitRes_SELECT_CC()
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D | LegalizeIntegerTypes.cpp | 1881 SDValue LL, LH, RL, RH; in ExpandIntRes_Logical() local 1883 GetExpandedInteger(N->getOperand(1), RL, RH); in ExpandIntRes_Logical() 1885 Hi = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), LH, RH); in ExpandIntRes_Logical() 1899 SDValue LL, LH, RL, RH; in ExpandIntRes_MUL() local 1901 GetExpandedInteger(N->getOperand(1), RL, RH); in ExpandIntRes_MUL() 1945 RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH); in ExpandIntRes_MUL() 1947 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, RH); in ExpandIntRes_MUL() 1954 RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH); in ExpandIntRes_MUL() 1956 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, RH); in ExpandIntRes_MUL()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypesGeneric.cpp | 525 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local 528 GetSplitOp(N->getOperand(2), RL, RH); in SplitRes_SELECT() 542 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); in SplitRes_SELECT() 547 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local 550 GetSplitOp(N->getOperand(3), RL, RH); in SplitRes_SELECT_CC() 555 N->getOperand(1), LH, RH, N->getOperand(4)); in SplitRes_SELECT_CC()
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D | TargetLowering.cpp | 2982 SDValue RL, SDValue RH) const { in expandMUL() 2997 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) || in expandMUL() 2998 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode())); in expandMUL() 3044 if (!LH.getNode() && !RH.getNode() && in expandMUL() 3052 RH = DAG.getNode(ISD::SRL, dl, VT, N->getOperand(1), Shift); in expandMUL() 3053 RH = DAG.getNode(ISD::TRUNCATE, dl, HiLoVT, RH); in expandMUL() 3065 RH = DAG.getNode(ISD::MUL, dl, HiLoVT, LL, RH); in expandMUL() 3067 Hi = DAG.getNode(ISD::ADD, dl, HiLoVT, Hi, RH); in expandMUL() 3074 RH = DAG.getNode(ISD::MUL, dl, HiLoVT, LL, RH); in expandMUL() 3076 Hi = DAG.getNode(ISD::ADD, dl, HiLoVT, Hi, RH); in expandMUL()
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/external/icu/icu4c/source/data/coll/ |
D | cy.txt | 14 "&R<rh<<<Rh<<<RH"
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/external/honggfuzz/examples/apache-httpd/corpus_http1/ |
D | 42ee40ca6c14930cc605046aacae7c07.0000d69e.honggfuzz.cov | 18 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 42 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 51 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 63 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 87 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 98 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 122 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 131 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 143 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 167 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$�
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D | 4a490558487db30574658fa225fe2ff3.0000720b.honggfuzz.cov | 25 �RH�+�{N���-��U�͛��/�c��q�[21?1�YW��㷓�1��Zٓ���-��H͡+���!FT=c��z5|�E�u��w��|��Ow�)������… 29 �RH�+�{N���-��U�͛��/�c��q�[21?1�YW��㷓�1��Zٓ���-��H͡+���!FT=c��z5|�E�u��w��|��Ow�)������…
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D | c20c8fc2302886d9f3e4e4eb2c6ce8ab.00011deb.honggfuzz.cov | 48 ��[�%mZ\\�QvS�9�O�ߙ�ъM�˦��hFwE�e#�(��.��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����… 53 ��[�%mZ\\�QvS�9�O�ߙ�ъM�˦��hFwE�e#�(��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����… 55 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 244 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 259 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 280 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 295 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 315 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V…
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/external/honggfuzz/examples/apache-httpd/corpus_http2/ |
D | 42ee40ca6c14930cc605046aacae7c07.0000d69e.honggfuzz.cov | 18 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 42 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 51 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 63 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 87 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 98 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 122 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 131 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 143 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$� 167 ��i1i��`�=�bT�&�T9�R�4�f��7�Ͳ��|��|a�nD���ʠ����`.��zoX�^۩Y�RH�Eo��`2kM�;�5�$�
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D | 4a490558487db30574658fa225fe2ff3.0000720b.honggfuzz.cov | 25 �RH�+�{N���-��U�͛��/�c��q�[21?1�YW��㷓�1��Zٓ���-��H͡+���!FT=c��z5|�E�u��w��|��Ow�)������… 29 �RH�+�{N���-��U�͛��/�c��q�[21?1�YW��㷓�1��Zٓ���-��H͡+���!FT=c��z5|�E�u��w��|��Ow�)������…
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D | c20c8fc2302886d9f3e4e4eb2c6ce8ab.00011deb.honggfuzz.cov | 48 ��[�%mZ\\�QvS�9�O�ߙ�ъM�˦��hFwE�e#�(��.��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����… 53 ��[�%mZ\\�QvS�9�O�ߙ�ъM�˦��hFwE�e#�(��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����… 55 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 244 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 259 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 280 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 295 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V… 315 …��#1����hFwE�e#�)��-��U��iU�۶+�<����l ����-ae�Rao�%�z��;��;���<g].EةRH����g�i��*�l��$�a>V…
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonBitSimplify.cpp | 1614 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy() local 1618 RH.Reg, RH.Sub, MRI); in propagateRegCopy() 1671 unsigned B, RegHalf &RH); 1701 const BitTracker::RegisterCell &RC, unsigned B, RegHalf &RH) { in matchHalf() argument 1768 RH.Reg = Reg; in matchHalf() 1769 RH.Sub = Sub; in matchHalf() 1770 RH.Low = Low; in matchHalf() 1772 if (!HBS::getFinalVRegClass(RH, MRI)) in matchHalf() 1773 RH.Sub = 0; in matchHalf()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonBitSimplify.cpp | 1702 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy() local 1704 Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, RH.Reg, RH.Sub, MRI); in propagateRegCopy() 1757 unsigned B, RegHalf &RH); 1800 const BitTracker::RegisterCell &RC, unsigned B, RegHalf &RH) { in matchHalf() argument 1867 RH.Reg = Reg; in matchHalf() 1868 RH.Sub = Sub; in matchHalf() 1869 RH.Low = Low; in matchHalf() 1871 if (!HBS::getFinalVRegClass(RH, MRI)) in matchHalf() 1872 RH.Sub = 0; in matchHalf()
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/external/cldr/tools/java/org/unicode/cldr/util/data/ |
D | localeReplacements.txt | 91 territory deprecated RH ZW
|