Searched refs:RHSCC (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 569 ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate(); in foldLogOpOfMaskedICmpsHelper() local
571 if (RHSCC != ICmpInst::ICMP_EQ && RHSCC != ICmpInst::ICMP_NE) return 0; in foldLogOpOfMaskedICmpsHelper()
637 unsigned right_type = getTypeOfMaskedICmp(A, D, E, RHSCC); in foldLogOpOfMaskedICmpsHelper()
719 ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate(); in FoldAndOfICmps() local
722 if (PredicatesFoldable(LHSCC, RHSCC)) { in FoldAndOfICmps()
745 if (LHSCst == RHSCst && LHSCC == RHSCC) { in FoldAndOfICmps()
776 if (LHSCC == RHSCC && ICmpInst::isEquality(LHSCC) && in FoldAndOfICmps()
815 RHSCC == ICmpInst::ICMP_UGE || RHSCC == ICmpInst::ICMP_ULE || in FoldAndOfICmps()
817 RHSCC == ICmpInst::ICMP_SGE || RHSCC == ICmpInst::ICMP_SLE) in FoldAndOfICmps()
825 ConstantRange::makeICmpRegion(RHSCC, RHSCst->getValue()); in FoldAndOfICmps()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 582 ICmpInst::Predicate &RHSCC) { in foldLogOpOfMaskedICmpsHelper() argument
628 if (decomposeBitTestICmp(RHS, RHSCC, R11, R12, R2)) { in foldLogOpOfMaskedICmpsHelper()
653 if (!ICmpInst::isEquality(RHSCC)) in foldLogOpOfMaskedICmpsHelper()
685 unsigned RightType = getTypeOfMaskedICmp(A, D, E, RHSCC); in foldLogOpOfMaskedICmpsHelper()
694 ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate(); in foldLogOpOfMaskedICmps() local
696 LHSCC, RHSCC); in foldLogOpOfMaskedICmps()
698 assert(ICmpInst::isEquality(LHSCC) && ICmpInst::isEquality(RHSCC) && in foldLogOpOfMaskedICmps()
796 if (RHSCC != NewCC) in foldLogOpOfMaskedICmps()
869 ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate(); in FoldAndOfICmps() local
872 if (PredicatesFoldable(LHSCC, RHSCC)) { in FoldAndOfICmps()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1474 AArch64CC::CondCode RHSCC; in emitConjunctionDisjunctionTreeRec() local
1475 SDValue CmpR = emitConjunctionDisjunctionTreeRec(DAG, RHS, RHSCC, Negate, in emitConjunctionDisjunctionTreeRec()
1478 RHSCC = AArch64CC::getInvertedCondCode(RHSCC); in emitConjunctionDisjunctionTreeRec()
1482 RHSCC); in emitConjunctionDisjunctionTreeRec()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1773 AArch64CC::CondCode RHSCC; in emitConjunctionRec() local
1774 SDValue CmpR = emitConjunctionRec(DAG, RHS, RHSCC, NegateR, CCOp, Predicate); in emitConjunctionRec()
1776 RHSCC = AArch64CC::getInvertedCondCode(RHSCC); in emitConjunctionRec()
1777 SDValue CmpL = emitConjunctionRec(DAG, LHS, OutCC, NegateL, CmpR, RHSCC); in emitConjunctionRec()
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