Searched refs:ROUND_W_D (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 366 ROUND_W_D = 4, enumerator
711 return Mfhc1Latency() + Latency::ROUND_W_D + Mthc1Latency(); in Round_w_dLatency()
713 return Latency::ROUND_W_D; in Round_w_dLatency()
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| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 399 ROUND_W_D = 4, enumerator
1510 return Latency::ROUND_W_D + Latency::MFC1; in GetInstructionLatency()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 639 ROUND_W_D = ((1U << 3) + 4), enumerator
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| D | disasm-mips.cc | 1102 case ROUND_W_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips.cc | 2920 GenInstrRegister(COP1, D, f0, fs, fd, ROUND_W_D); in round_w_d()
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| D | simulator-mips.cc | 2868 case ROUND_W_D: // Round double to word (round half to even). in DecodeTypeRegisterDRsType()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 669 ROUND_W_D = ((1U << 3) + 4), enumerator
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| D | disasm-mips64.cc | 1175 case ROUND_W_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips64.cc | 3311 GenInstrRegister(COP1, D, f0, fs, fd, ROUND_W_D); in round_w_d()
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| D | simulator-mips64.cc | 3187 case ROUND_W_D: // Round double to word (round half to even). in DecodeTypeRegisterDRsType()
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