/external/v8/src/compiler/mips64/ |
D | instruction-scheduler-mips64.cc | 398 ROUND_W_S = 4, enumerator 1518 return Latency::ROUND_W_S + Latency::MFC1; in GetInstructionLatency()
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/external/v8/src/compiler/mips/ |
D | instruction-scheduler-mips.cc | 365 ROUND_W_S = 4, enumerator 1711 return Latency::ROUND_W_S; in GetInstructionLatency()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
D | valid.s | 132 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
D | valid.s | 197 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/ |
D | valid.s | 191 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 230 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 229 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/v8/src/mips/ |
D | constants-mips.h | 612 ROUND_W_S = ((1U << 3) + 4), enumerator
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D | assembler-mips.cc | 2915 GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S); in round_w_s()
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D | simulator-mips.cc | 3454 case ROUND_W_S: { in DecodeTypeRegisterSRsType()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 229 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 297 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
D | valid.s | 271 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 299 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/v8/src/mips64/ |
D | constants-mips64.h | 643 ROUND_W_S = ((1U << 3) + 4), enumerator
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D | assembler-mips64.cc | 3306 GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S); in round_w_s()
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D | simulator-mips64.cc | 2853 case ROUND_W_S: { in DecodeTypeRegisterSRsType()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
D | valid.s | 254 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
D | valid.s | 255 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 303 # CHECK: # <MCInst #{{.*}} ROUND_W_S
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrFPU.td | 270 def ROUND_W_S : MMRel, StdMMR6Rel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, II_ROUND>,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsInstrFPU.td | 357 def ROUND_W_S : MMRel, StdMMR6Rel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, II_ROUND>,
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/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 1366 23062U, // ROUND_W_S 3080 0U, // ROUND_W_S
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 2187 UINT64_C(1174405132), // ROUND_W_S 3186 case Mips::ROUND_W_S: 9913 …tdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_S = 2174
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D | MipsGenInstrInfo.inc | 2189 ROUND_W_S = 2174, 6234 …, 1, 4, 689, 0, 0x4ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, // Inst #2174 = ROUND_W_S 10222 { Mips::ROUND_W_S, Mips::ROUND_W_S, Mips::ROUND_W_S_MM }, 10345 { Mips::ROUND_W_S, Mips::ROUND_W_S, Mips::ROUND_W_S_MMR6 },
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