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Searched refs:ROUND_W_S (Results 1 – 25 of 29) sorted by relevance

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/external/v8/src/compiler/mips64/
Dinstruction-scheduler-mips64.cc398 ROUND_W_S = 4, enumerator
1518 return Latency::ROUND_W_S + Latency::MFC1; in GetInstructionLatency()
/external/v8/src/compiler/mips/
Dinstruction-scheduler-mips.cc365 ROUND_W_S = 4, enumerator
1711 return Latency::ROUND_W_S; in GetInstructionLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/
Dvalid.s132 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/
Dvalid.s197 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/
Dvalid.s191 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/
Dvalid.s230 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/
Dvalid.s229 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/v8/src/mips/
Dconstants-mips.h612 ROUND_W_S = ((1U << 3) + 4), enumerator
Dassembler-mips.cc2915 GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S); in round_w_s()
Dsimulator-mips.cc3454 case ROUND_W_S: { in DecodeTypeRegisterSRsType()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/
Dvalid.s229 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/
Dvalid.s297 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/
Dvalid.s271 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/
Dvalid.s299 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/v8/src/mips64/
Dconstants-mips64.h643 ROUND_W_S = ((1U << 3) + 4), enumerator
Dassembler-mips64.cc3306 GenInstrRegister(COP1, S, f0, fs, fd, ROUND_W_S); in round_w_s()
Dsimulator-mips64.cc2853 case ROUND_W_S: { in DecodeTypeRegisterSRsType()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/
Dvalid.s254 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/
Dvalid.s255 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/
Dvalid.s303 # CHECK: # <MCInst #{{.*}} ROUND_W_S
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td270 def ROUND_W_S : MMRel, StdMMR6Rel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, II_ROUND>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsInstrFPU.td357 def ROUND_W_S : MMRel, StdMMR6Rel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, II_ROUND>,
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc1366 23062U, // ROUND_W_S
3080 0U, // ROUND_W_S
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc2187 UINT64_C(1174405132), // ROUND_W_S
3186 case Mips::ROUND_W_S:
9913 …tdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_S = 2174
DMipsGenInstrInfo.inc2189 ROUND_W_S = 2174,
6234 …, 1, 4, 689, 0, 0x4ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, // Inst #2174 = ROUND_W_S
10222 { Mips::ROUND_W_S, Mips::ROUND_W_S, Mips::ROUND_W_S_MM },
10345 { Mips::ROUND_W_S, Mips::ROUND_W_S, Mips::ROUND_W_S_MMR6 },

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