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Searched refs:RSB (Results 1 – 25 of 79) sorted by relevance

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/external/tremolo/Tremolo/
DbitwiseARM.s54 RSB r14,r12,#32 @ r14= 32-bitsLeftInWord
59 RSB r14,r14,#32 @ r14= 32-bitsLeftInWord
62 RSB r14,r14,r14,LSL r1
72 RSB r14,r12,#32 @ r14= 32-bitsLeftInWord
83 RSB r11,r11,r11,LSL r5 @ r11= mask
114 RSB r14,r14,r14,LSL r1
123 RSB r14,r14,r14,LSL r1
154 RSB r10,r10,#0 @ r10= bits to skip
195 RSB r10,r10,#32 @ r10= bits left in word
227 RSB r3,r3,#32 @ r3 = BitsInWord
[all …]
DmdctLARM.s126 RSB r12,r12,#0
127 RSB r5, r5, #0
128 RSB r6, r6, #0
129 RSB r7, r7, #0
166 RSB r5, r5, #0
328 RSB r6, r6, #0
348 RSB r6, r6, #0
382 RSB r8, r8, #0 @ r8 = -ro0
393 RSB r6, r6, #0 @ r6 = -ri0
488 RSB r11,r11,#0
[all …]
DmdctARM.s128 RSB r12,r12,#0
129 RSB r5, r5, #0
130 RSB r6, r6, #0
131 RSB r7, r7, #0
168 RSB r5, r5, #0
330 RSB r6, r6, #0
354 RSB r6, r6, #0
387 RSB r8,r8,#0 @ r8 = -ro0
404 RSB r6,r6,#0 @ r6 = -ri0
503 RSB r11,r11,#0
[all …]
Ddpen.s96 RSB r1, r4, #0 @ r1 = i-read = 0-read
120 RSB r1, r4, #0 @ r1 = i = -read
152 RSB r1, r4, #0 @ r1 = i-read = 0-read
177 RSB r1, r4, #0 @ r1 = i = -read
211 RSB r1, r4, #0 @ r1 = i-read = 0-read
294 RSB r0, r0, r0, LSL r2 @ r0 = mask = (1<<s->q_bits)-1
323 RSB r0, r0, r0, LSL r1 @ r8 = mask = (1<<s->q_pack)-1
/external/libxaac/decoder/armv7/
Dixheaacd_esbr_radix4bfly.s86 RSB r5, r5, #0
89 RSB r5, r5, #0
108 RSB r11, r11, #0
115 RSB r14, r14, #0
118 RSB r14, r14, #0
Dixheaacd_shiftrountine.s33 RSB r3, r3, #0
61 RSB r2, r3, #0x1f
Dixheaacd_enery_calc_per_subband.s113 RSB R12, R14, #0
133 RSB R12, R12, #17
Dixheaacd_rescale_subbandsamples.s78 RSB R4, R4, #0
156 RSB R4, R4, #0
Dixheaacd_lap1.s89 RSB r2, r2, #16
Dixheaacd_overlap_add2.s34 RSB R4, R4, #15
40 RSB R4, R4, #0
Dixheaacd_conv_ergtoamplitudelp.s138 RSB R6, R6, #0
Dixheaacd_overlap_add1.s50 RSB R7, R7, #0
62 RSB R4, R4, #0
Dixheaacd_cos_sin_mod.s359 RSB R12, R11, #0
379 RSB R6, R6, #0
Dixheaacd_esbr_cos_sin_mod_loop2.s47 RSB R6, R7, #0
/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_420p.s128 RSB r6,r6,#16
182 RSB r6,r6,#16
Dihevcd_fmt_conv_420sp_to_420sp.s126 RSB r6,r6,#32
179 RSB r6,r6,#16
/external/sonivox/arm-wt-22k/lib_src/
DARM-E_filter_gnu.s79 RSB b1, b1, #0 @ b1 = -b1
80 RSB b2, b2, #0 @ b2 = -b2
/external/vixl/test/aarch32/config/
Dcond-rdlow-rnlow-operand-immediate-t32.json40 "Rsb", // RSB<c>{<q>} {<Rd>}, <Rn>, #0 ; T1
229 "Rsb" // RSB<c>{<q>} {<Rd>}, <Rn>, #0 ; T1
Dcond-rd-rn-operand-const-a32.json44 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; A1
Dcond-rd-rn-operand-rm-shift-rs-a32.json41 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
Dcond-rd-rn-operand-const-t32.json52 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T2
Dcond-rd-rn-operand-rm-shift-amount-1to32-a32.json43 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
Dcond-rd-rn-operand-rm-shift-amount-1to31-a32.json43 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
Dcond-rd-rn-operand-rm-shift-amount-1to31-t32.json49 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T1
Dcond-rd-rn-operand-rm-shift-amount-1to32-t32.json49 "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T1

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