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Searched refs:RSTMGR_RESET (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/
Dreset_manager_gen5.c46 setbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
48 clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
58 const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0)); in socfpga_per_reset_all()
Dreset_manager_s10.c37 setbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
39 clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
49 const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0)); in socfpga_per_reset_all()
Dreset_manager_arria10.c285 setbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
287 clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
299 const u32 l4wd0 = (1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0)) | in socfpga_per_reset_all()
300 (1 << RSTMGR_RESET(SOCFPGA_RESET(L4SYSTIMER0)))); in socfpga_per_reset_all()
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dreset_manager.h31 #define RSTMGR_RESET(_reset) \ macro
Dreset_manager_s10.h64 #define RSTMGR_RESET(_reset) \ macro