Searched refs:R_028240_PA_SC_GENERIC_SCISSOR_TL (Results 1 – 8 of 8) sorted by relevance
/external/mesa3d/src/gallium/drivers/r600/ |
D | r600d.h | 1026 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro 2206 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro 2491 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro 2889 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
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D | evergreend.h | 1183 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
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D | evergreen_state.c | 2752 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2); in cayman_init_atom_start_cs() 3161 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2); in evergreen_init_atom_start_cs()
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D | r600_state.c | 2397 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2); in r600_init_atom_start_cs()
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/external/mesa3d/src/amd/vulkan/ |
D | si_cmd_buffer.c | 390 radeon_set_context_reg(cs, R_028240_PA_SC_GENERIC_SCISSOR_TL, in si_emit_config()
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_state.c | 4909 si_pm4_set_reg(pm4, R_028240_PA_SC_GENERIC_SCISSOR_TL, S_028240_WINDOW_OFFSET_DISABLE(1)); in si_init_config()
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/external/mesa3d/src/amd/common/ |
D | gfx9d.h | 4249 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
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D | sid.h | 5384 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
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