Home
last modified time | relevance | path

Searched refs:RawbitsToFloat (Results 1 – 12 of 12) sorted by relevance

/external/vixl/src/
Dutils-vixl.cc35 const float kFP32DefaultNaN = RawbitsToFloat(0x7fc00000);
45 const float kFP32PositiveInfinity = RawbitsToFloat(0x7f800000);
46 const float kFP32NegativeInfinity = RawbitsToFloat(0xff800000);
81 float RawbitsToFloat(uint32_t bits) { in RawbitsToFloat() function
158 return RawbitsToFloat(bits); in FloatPack()
330 return RawbitsToFloat((sign << 31) | (exponent << kFloatMantissaBits) | in FPToFloat()
364 return RawbitsToFloat((sign << 31) | (exponent << 23) | payload); in FPToFloat()
Dutils-vixl.h262 float RawbitsToFloat(uint32_t bits);
265 return RawbitsToFloat(bits); in rawbits_to_float()
427 return RawbitsToFloat(FloatToRawbits(num) | kFP32QuietNaNMask); in ToQuietNaN()
673 return RawbitsToFloat(result); in Imm8ToFP32()
1257 return RawbitsToFloat(bits); in FPRoundToFloat()
/external/vixl/test/aarch64/
Dtest-utils-aarch64.h118 return RawbitsToFloat(sreg_bits(code)); in sreg()
Dtest-utils-aarch64.cc46 const float kFP32SignallingNaN = RawbitsToFloat(0x7f800001);
51 const float kFP32QuietNaN = RawbitsToFloat(0x7fc00001);
Dtest-assembler-aarch64.cc10562 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s6); in TEST()
11275 float s1 = RawbitsToFloat(0x7f951111); in TEST()
11276 float s2 = RawbitsToFloat(0x7f952222); in TEST()
11277 float sa = RawbitsToFloat(0x7f95aaaa); in TEST()
11278 float q1 = RawbitsToFloat(0x7fea1111); in TEST()
11279 float q2 = RawbitsToFloat(0x7fea2222); in TEST()
11280 float qa = RawbitsToFloat(0x7feaaaaa); in TEST()
11289 float s1_proc = RawbitsToFloat(0x7fd51111); in TEST()
11290 float s2_proc = RawbitsToFloat(0x7fd52222); in TEST()
11291 float sa_proc = RawbitsToFloat(0x7fd5aaaa); in TEST()
[all …]
Dtest-simulator-aarch64.cc172 static float rawbits_to_fp(uint32_t bits) { return RawbitsToFloat(bits); } in rawbits_to_fp()
/external/vixl/test/aarch32/
Dtest-utils-aarch32.cc226 RawbitsToFloat(result), in EqualFP32()
Dtest-assembler-aarch32.cc4063 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s3); in TEST_T32()
4156 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s3); in TEST_T32()
4220 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s4); in TEST_T32()
4229 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s3); in TEST_T32()
4292 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s4); in TEST_T32()
4301 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s3); in TEST_T32()
4377 ASSERT_EQUAL_FP32(RawbitsToFloat(0x89abcdef), s3); in TEST_T32()
Dtest-disasm-a32.cc2426 COMPARE_BOTH(Vmov(s2, RawbitsToFloat(0x0000db6c)), in TEST()
2429 COMPARE_BOTH(Vmov(s3, RawbitsToFloat(0x327b23c6)), in TEST()
2433 COMPARE_BOTH(Vmov(s4, RawbitsToFloat(0xffcc7fff)), in TEST()
2436 COMPARE_BOTH(Vmov(s5, RawbitsToFloat(0xb72df575)), in TEST()
/external/vixl/src/aarch64/
Dinstructions-aarch64.cc188 return RawbitsToFloat(result); in Imm8ToFP32()
Dinstructions-aarch64.h457 float GetLiteralFP32() const { return RawbitsToFloat(GetLiteral32()); } in GetLiteralFP32()
Dsimulator-aarch64.cc133 VIXL_ASSERT(IsSignallingNaN(RawbitsToFloat(nan_bits[0] & kSRegMask))); in ResetState()