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Searched refs:RawbitsToFloat16 (Results 1 – 9 of 9) sorted by relevance

/external/vixl/src/
Dutils-vixl.cc36 const Float16 kFP16DefaultNaN = RawbitsToFloat16(0x7e00);
39 const Float16 kFP16PositiveZero = RawbitsToFloat16(0x0);
40 const Float16 kFP16NegativeZero = RawbitsToFloat16(0x8000);
43 const Float16 kFP16PositiveInfinity = RawbitsToFloat16(0x7c00);
44 const Float16 kFP16NegativeInfinity = RawbitsToFloat16(0xfc00);
74 Float16 RawbitsToFloat16(uint16_t bits) { in RawbitsToFloat16() function
152 return RawbitsToFloat16(bits); in Float16Pack()
216 return RawbitsToFloat16(rawbits_ ^ 0x8000); in operator -()
477 return RawbitsToFloat16(result); in FPToFloat16()
532 return RawbitsToFloat16(result); in FPToFloat16()
Dutils-vixl.h238 friend Float16 RawbitsToFloat16(uint16_t bits);
260 Float16 RawbitsToFloat16(uint16_t bits);
363 return Float16Classify(RawbitsToFloat16(value)); in float16classify()
435 RawbitsToFloat16(Float16ToRawbits(num) | kFP16QuietNaNMask)); in ToQuietNaN()
1240 return RawbitsToFloat16( in FPRoundToFloat16()
/external/vixl/test/aarch64/
Dtest-utils-aarch64.h114 return RawbitsToFloat16(hreg_bits(code)); in hreg()
Dtest-utils-aarch64.cc47 const Float16 kFP16SignallingNaN = RawbitsToFloat16(0x7c01);
52 const Float16 kFP16QuietNaN = RawbitsToFloat16(0x7e01);
Dtest-assembler-aarch64.cc10449 __ Fmov(h7, RawbitsToFloat16(0x6400U)); in TEST()
10452 __ Fmov(h12, RawbitsToFloat16(0x7BFF)); in TEST()
10453 __ Fmov(h13, RawbitsToFloat16(0x57F2)); in TEST()
10455 __ Fmov(h23, RawbitsToFloat16(0xC500U)); in TEST()
10458 __ Fmov(h21, RawbitsToFloat16(0x6404U)); in TEST()
10459 __ Fmov(h26, RawbitsToFloat16(0x0U)); in TEST()
10460 __ Fmov(h27, RawbitsToFloat16(0x7e00U)); in TEST()
10471 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x6400U), h7); in TEST()
10474 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x7BFF), h12); in TEST()
10475 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x57F2U), h13); in TEST()
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Dtest-simulator-aarch64.cc179 return FPToDouble(RawbitsToFloat16(bits), kIgnoreDefaultNaN); in rawbits_to_fp()
/external/vixl/src/aarch64/
Dinstructions-aarch64.cc174 return RawbitsToFloat16(result); in Imm8ToFloat16()
Dlogic-aarch64.cc4541 SimFloat16 result(OP(SimFloat16(RawbitsToFloat16(src.Uint(vform, 0))), \
4542 SimFloat16(RawbitsToFloat16(src.Uint(vform, 1))))); \
4821 FPToFloat(RawbitsToFloat16(src.Float<uint16_t>(i)), in fcvtl()
4842 FPToFloat(RawbitsToFloat16( in fcvtl2()
Dsimulator-aarch64.h183 *dst = RawbitsToFloat16(rawbits); in ReadLane()
1008 return RawbitsToFloat16(ReadHRegisterBits(code));