| /external/llvm/test/MC/Mips/ |
| D | mips-reginfo-fp32.s | 25 # abs.s - Reads and writes from/to $f0.
27 # round.w.d - Reads $f4 and $f5 and writes to $f2.
29 # ceil.w.s - Reads $f8 and writes to $f10.
31 # cvt.s.d - Reads from $f12 and $f13 and writes to $f14
33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
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| D | mips-reginfo-fp64.s | 47 # abs.s - Reads and writes from/to $f0.
49 # round.w.d - Reads $f4 and writes to $f2.
51 # ceil.w.s - Reads $f8 and writes to $f10.
53 # cvt.s.d - Reads from $f12 and writes to $f14.
55 # abs.d - Reads from $f30 and writes to $f30.
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | mips-reginfo-fp32.s | 25 # abs.s - Reads and writes from/to $f0.
27 # round.w.d - Reads $f4 and $f5 and writes to $f2.
29 # ceil.w.s - Reads $f8 and writes to $f10.
31 # cvt.s.d - Reads from $f12 and $f13 and writes to $f14
33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
|
| D | mips-reginfo-fp64.s | 47 # abs.s - Reads and writes from/to $f0.
49 # round.w.d - Reads $f4 and writes to $f2.
51 # ceil.w.s - Reads $f8 and writes to $f10.
53 # cvt.s.d - Reads from $f12 and writes to $f14.
55 # abs.d - Reads from $f30 and writes to $f30.
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenSchedule.cpp | 383 IdxVec &Writes, IdxVec &Reads) const { in findRWs()
388 findRWs(ReadDefs, Reads, true); in findRWs()
509 IdxVec Writes, Reads; in collectSchedClasses() local
511 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); in collectSchedClasses()
516 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, ProcIndices); in collectSchedClasses()
556 for (IdxIter RI = SC.Reads.begin(), RE = SC.Reads.end(); RI != RE; ++RI) in collectSchedClasses()
568 IdxVec Reads; in collectSchedClasses() local
570 Writes, Reads); in collectSchedClasses()
573 for (IdxIter RI = Reads.begin(), RE = Reads.end(); RI != RE; ++RI) in collectSchedClasses()
590 ArrayRef<unsigned> Reads) const { in findSchedClassIdx()
[all …]
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| D | CodeGenSchedule.h | 133 IdxVec Reads; member
149 makeArrayRef(Reads) == R; in isKeyEqual()
370 void findRWs(const RecVec &RWDefs, IdxVec &Writes, IdxVec &Reads) const;
383 ArrayRef<unsigned> Reads) const;
432 void collectRWResources(ArrayRef<unsigned> Writes, ArrayRef<unsigned> Reads,
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| D | SubtargetEmitter.cpp | 853 IdxVec Reads = SC.Reads; in GenSchedClassTables() local
867 Reads.clear(); in GenSchedClassTables()
869 Writes, Reads); in GenSchedClassTables()
879 Writes, Reads); in GenSchedClassTables()
959 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables()
962 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel); in GenSchedClassTables()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenSchedule.cpp | 494 IdxVec &Writes, IdxVec &Reads) const { in findRWs()
499 findRWs(ReadDefs, Reads, true); in findRWs()
612 IdxVec Writes, Reads; in collectSchedClasses() local
614 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); in collectSchedClasses()
617 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/{0}); in collectSchedClasses()
665 for (IdxIter RI = SC.Reads.begin(), RE = SC.Reads.end(); RI != RE; ++RI) in collectSchedClasses()
678 IdxVec Reads; in collectSchedClasses() local
680 Writes, Reads); in collectSchedClasses()
684 for (unsigned RIdx : Reads) in collectSchedClasses()
770 SC.Reads = OperReads; in addSchedClass()
[all …]
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| D | CodeGenSchedule.h | 131 IdxVec Reads; member
149 makeArrayRef(Reads) == R; in isKeyEqual()
418 void findRWs(const RecVec &RWDefs, IdxVec &Writes, IdxVec &Reads) const;
485 void collectRWResources(ArrayRef<unsigned> Writes, ArrayRef<unsigned> Reads,
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| D | SubtargetEmitter.cpp | 1033 IdxVec Reads = SC.Reads; in GenSchedClassTables() local
1047 Reads.clear(); in GenSchedClassTables()
1049 Writes, Reads); in GenSchedClassTables()
1058 Writes, Reads); in GenSchedClassTables()
1156 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables()
1159 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel); in GenSchedClassTables()
|
| /external/grpc-grpc/doc/ |
| D | status_ordering.md | 1 Ordering Status and Reads in the gRPC API
5 1. Reads and Writes Must not succeed after Status has been delivered.
7 3. Reads May continue to succeed after a failing write.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMParallelDSP.cpp | 494 static void AliasCandidates(BasicBlock *Header, Instructions &Reads, in AliasCandidates() argument
498 Reads.push_back(&I); in AliasCandidates()
507 static bool AreAliased(AliasAnalysis *AA, Instructions &Reads, in AreAliased() argument
618 Instructions Reads, Writes; in MatchSMLAD() local
619 AliasCandidates(Header, Reads, Writes); in MatchSMLAD()
622 if (AreAliased(AA, Reads, Writes, R.MACCandidates)) in MatchSMLAD()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
| D | InstrBuilder.cpp | 297 ID.Reads.resize(TotalUses); in populateReads()
299 ReadDescriptor &Read = ID.Reads[CurrentUse]; in populateReads()
308 ReadDescriptor &Read = ID.Reads[NumExplicitUses + CurrentUse]; in populateReads()
411 for (const ReadDescriptor &RD : D.Reads) { in createInstruction()
|
| /external/tensorflow/tensorflow/core/api_def/base_api/ |
| D | api_def_ReadFile.pbtxt | 3 summary: "Reads and outputs the entire contents of the input filename."
|
| D | api_def_ReadVariableOp.pbtxt | 15 summary: "Reads the value of a variable."
|
| D | api_def_Restore.pbtxt | 38 Reads a tensor stored in one or several files. If there are several files (for
|
| /external/blktrace/doc/ |
| D | blktrace.tex | 163 Reads Queued: 0, 0KiB Writes Queued: 7, 128KiB
165 Reads Completed: 0, 0KiB Writes Completed: 11, 168KiB
170 Reads Queued: 0, 0KiB Writes Queued: 1, 28KiB
172 Reads Completed: 0, 0KiB Writes Completed: 0, 0KiB
177 Reads Queued: 0, 0KiB Writes Queued: 11, 168KiB
179 Reads Completed: 0, 0KiB Writes Completed: 11, 168KiB
299 Reads Queued: 0, 0KiB Writes Queued: 9, 5,520KiB
301 Reads Completed: 0, 0KiB Writes Completed: 0, 0KiB
305 Reads Queued: 2,411, 38,576KiB Writes Queued: 769, 425,408KiB
307 Reads Completed: 0, 0KiB Writes Completed: 0, 0KiB
[all …]
|
| /external/webrtc/webrtc/modules/audio_processing/transient/test/ |
| D | readPCM.m | 4 %Reads a signal from a PCM file.
|
| D | readDetection.m | 4 %Reads a detection signal from a DAT file.
|
| /external/autotest/client/site_tests/platform_HighResTimers/ |
| D | control | 17 Reads from /proc/timer_list to see if any reported timers have nanosecond
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | EarlyIfConversion.cpp | 275 SmallVector<unsigned, 8> Reads; in findInsertionPoint() local
301 Reads.push_back(Reg); in findInsertionPoint()
304 while (!Reads.empty()) in findInsertionPoint()
305 for (MCRegUnitIterator Units(Reads.pop_back_val(), TRI); Units.isValid(); in findInsertionPoint()
|
| /external/llvm/lib/CodeGen/ |
| D | EarlyIfConversion.cpp | 274 SmallVector<unsigned, 8> Reads; in findInsertionPoint() local
300 Reads.push_back(Reg); in findInsertionPoint()
303 while (!Reads.empty()) in findInsertionPoint()
304 for (MCRegUnitIterator Units(Reads.pop_back_val(), TRI); Units.isValid(); in findInsertionPoint()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBundle.h | 154 bool Reads; member
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBundle.h | 155 bool Reads; member
|
| /external/python/rsa/doc/ |
| D | cli.rst | 32 | pyrsa-priv2pub | Reads a private key and outputs the | \- …
|