Searched refs:Recip (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2150 SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in LowerFastFDIV() local
2151 return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, &Flags); in LowerFastFDIV()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 362 SDValue buildSqrtEstimateImpl(SDValue Op, SDNodeFlags *Flags, bool Recip);
8800 APFloat Recip(N1APF.getSemantics(), 1); // 1.0 in visitFDIV() local
8801 APFloat::opStatus st = Recip.divide(N1APF, APFloat::rmNearestTiesToEven); in visitFDIV()
8810 TLI.isFPImmLegal(Recip, VT))) in visitFDIV()
8812 DAG.getConstantFP(Recip, DL, VT), Flags); in visitFDIV()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 438 SDValue buildSqrtEstimateImpl(SDValue Op, SDNodeFlags Flags, bool Recip);
11311 APFloat Recip(N1APF.getSemantics(), 1); // 1.0 in visitFDIV() local
11312 APFloat::opStatus st = Recip.divide(N1APF, APFloat::rmNearestTiesToEven); in visitFDIV()
11321 TLI.isFPImmLegal(Recip, VT))) in visitFDIV()
11323 DAG.getConstantFP(Recip, DL, VT), Flags); in visitFDIV()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 5769 SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in lowerFastUnsafeFDIV() local
5770 return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, Flags); in lowerFastUnsafeFDIV()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrVSX.td | 1026 // Recip. square root estimate
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrVSX.td | 1156 // Recip. square root estimate
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