Home
last modified time | relevance | path

Searched refs:RegN (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/
DBPFISelDAGToDAG.cpp496 const RegisterSDNode *RegN = dyn_cast<RegisterSDNode>(Node->getOperand(1)); in PreprocessCopyToReg() local
497 if (!RegN || !TargetRegisterInfo::isVirtualRegister(RegN->getReg())) in PreprocessCopyToReg()
521 << TargetRegisterInfo::virtReg2Index(RegN->getReg()) in PreprocessCopyToReg()
523 load_to_vreg_[RegN->getReg()] = mem_load_op; in PreprocessCopyToReg()
578 const RegisterSDNode *RegN = in PreprocessTrunc() local
580 if (!RegN || !TargetRegisterInfo::isVirtualRegister(RegN->getReg())) in PreprocessTrunc()
582 unsigned AndOpReg = RegN->getReg(); in PreprocessTrunc()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCodeEmitter.cpp1559 unsigned RegN = MI.getOperand(OpIdx).getReg(); in encodeVFPRn() local
1561 bool isSPVFP = ARM::SPRRegisterClass->contains(RegN); in encodeVFPRn()
1562 RegN = getARMRegisterNumbering(RegN); in encodeVFPRn()
1564 Binary |= RegN << ARMII::RegRnShift; in encodeVFPRn()
1566 Binary |= ((RegN & 0x1E) >> 1) << ARMII::RegRnShift; in encodeVFPRn()
1567 Binary |= (RegN & 0x01) << ARMII::N_BitShift; in encodeVFPRn()
1773 unsigned RegN = MI.getOperand(OpIdx).getReg(); in encodeNEONRn() local
1775 RegN = getARMRegisterNumbering(RegN); in encodeNEONRn()
1776 Binary |= (RegN & 0xf) << ARMII::RegRnShift; in encodeNEONRn()
1777 Binary |= ((RegN >> 4) & 1) << ARMII::N_BitShift; in encodeNEONRn()
/external/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp1029 unsigned ImN, RegN, Width; in isLossyShiftLeft() local
1033 RegN = 1; in isLossyShiftLeft()
1042 RegN = 2; in isLossyShiftLeft()
1047 RegN = 1; in isLossyShiftLeft()
1062 RegN = 2; in isLossyShiftLeft()
1069 if (RegN != OpN) in isLossyShiftLeft()
1089 unsigned ImN, RegN; in isLossyShiftRight() local
1094 RegN = 1; in isLossyShiftRight()
1106 RegN = 2; in isLossyShiftRight()
1111 RegN = 1; in isLossyShiftRight()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp1087 unsigned ImN, RegN, Width; in isLossyShiftLeft() local
1091 RegN = 1; in isLossyShiftLeft()
1100 RegN = 2; in isLossyShiftLeft()
1105 RegN = 1; in isLossyShiftLeft()
1120 RegN = 2; in isLossyShiftLeft()
1127 if (RegN != OpN) in isLossyShiftLeft()
1147 unsigned ImN, RegN; in isLossyShiftRight() local
1152 RegN = 1; in isLossyShiftRight()
1164 RegN = 2; in isLossyShiftRight()
1169 RegN = 1; in isLossyShiftRight()
[all …]
DHexagonConstExtenders.cpp1625 unsigned RegN = ED.OpNum; in replaceInstrExact() local
1628 if (i != RegN) in replaceInstrExact()