| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 1773 StringRef RegPair = Name; in processInstruction() local
1774 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1778 StringRef RegPair = Name; in processInstruction() local
1779 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1790 StringRef RegPair = Name; in processInstruction() local
1791 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1795 StringRef RegPair = Name; in processInstruction() local
1796 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1807 StringRef RegPair = Name; in processInstruction() local
1808 Rt.setReg(matchRegister(RegPair)); in processInstruction()
[all …]
|
| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 2001 StringRef RegPair = Name; in processInstruction() local
2002 Rs.setReg(matchRegister(RegPair)); in processInstruction()
2007 StringRef RegPair = Name; in processInstruction() local
2008 Rs.setReg(matchRegister(RegPair)); in processInstruction()
2020 StringRef RegPair = Name; in processInstruction() local
2021 Rs.setReg(matchRegister(RegPair)); in processInstruction()
2026 StringRef RegPair = Name; in processInstruction() local
2027 Rs.setReg(matchRegister(RegPair)); in processInstruction()
2039 StringRef RegPair = Name; in processInstruction() local
2040 Rt.setReg(matchRegister(RegPair)); in processInstruction()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | regpair_hint_phys.ll | 2 ; ARM target used to fail an assertion if RegPair{Odd|Even} hint pointed to a
|
| /external/llvm/test/CodeGen/ARM/ |
| D | regpair_hint_phys.ll | 2 ; ARM target used to fail an assertion if RegPair{Odd|Even} hint pointed to a
|
| /external/v8/src/interpreter/ |
| D | bytecode-operands.h | 19 V(RegPair, OperandTypeInfo::kScalableSignedByte)
|
| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 726 for (auto RegPair : SrcRegs) { in insertPHI() local
727 MIB.addReg(RegPair.Reg, 0, RegPair.SubReg); in insertPHI()
732 MRI->clearKillFlags(RegPair.Reg); in insertPHI()
|
| D | RegAllocPBQP.cpp | 118 typedef std::pair<unsigned, unsigned> RegPair; typedef in __anonc34e603b0111::RegAllocPBQP
119 typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 771 for (const RegSubRegPair &RegPair : SrcRegs) { in insertPHI() local
772 MIB.addReg(RegPair.Reg, 0, RegPair.SubReg); in insertPHI()
777 MRI.clearKillFlags(RegPair.Reg); in insertPHI()
|
| D | RegAllocPBQP.cpp | 149 using RegPair = std::pair<unsigned, unsigned>; typedef in __anon58adb7930111::RegAllocPBQP
150 using CoalesceMap = std::map<RegPair, PBQP::PBQPNum>;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | RegAllocPBQP.cpp | 117 typedef std::pair<unsigned, unsigned> RegPair; typedef in __anon46417c670111::RegAllocPBQP
118 typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 537 static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair,
2453 static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, in DecodeMovePRegPair() argument
2455 switch (RegPair) { in DecodeMovePRegPair()
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 2227 unsigned RegPair = fieldFromInstruction(Insn, 7, 3); in DecodeMovePRegPair() local
2229 switch (RegPair) { in DecodeMovePRegPair()
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 238 let Name = "RegPair";
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 3920 for (auto const &RegPair : RegsToPass) in LowerCall() local
3921 for (MCSubRegIterator SubRegs(RegPair.first, TRI, /*IncludeSelf=*/true); in LowerCall()
|