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Searched refs:RegSequence (Results 1 – 9 of 9) sorted by relevance

/external/llvm/include/llvm/MC/
DMCInstrDesc.h126 RegSequence, enumerator
307 bool isRegSequenceLike() const { return Flags & (1 << MCID::RegSequence); } in isRegSequenceLike()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/
DMCInstrDesc.h148 RegSequence, enumerator
349 bool isRegSequenceLike() const { return Flags & (1ULL << MCID::RegSequence); } in isRegSequenceLike()
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp127 SmallVector<const SCEV *, 16> RegSequence; member in __anon5f7a77cb0211::RegUseTracker
142 iterator begin() { return RegSequence.begin(); } in begin()
143 iterator end() { return RegSequence.end(); } in end()
144 const_iterator begin() const { return RegSequence.begin(); } in begin()
145 const_iterator end() const { return RegSequence.end(); } in end()
156 RegSequence.push_back(Reg); in CountRegister()
206 RegSequence.clear(); in clear()
/external/llvm/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp160 SmallVector<const SCEV *, 16> RegSequence; member in __anon445c839f0211::RegUseTracker
175 iterator begin() { return RegSequence.begin(); } in begin()
176 iterator end() { return RegSequence.end(); } in end()
177 const_iterator begin() const { return RegSequence.begin(); } in begin()
178 const_iterator end() const { return RegSequence.end(); } in end()
189 RegSequence.push_back(Reg); in countRegister()
238 RegSequence.clear(); in clear()
/external/llvm/include/llvm/CodeGen/
DMachineInstr.h566 return hasProperty(MCID::RegSequence, Type);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp224 SmallVector<const SCEV *, 16> RegSequence; member in __anon3e6f8af70211::RegUseTracker
240 iterator begin() { return RegSequence.begin(); } in begin()
241 iterator end() { return RegSequence.end(); } in end()
242 const_iterator begin() const { return RegSequence.begin(); } in begin()
243 const_iterator end() const { return RegSequence.end(); } in end()
254 RegSequence.push_back(Reg); in countRegister()
303 RegSequence.clear(); in clear()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DMachineInstr.h620 return hasProperty(MCID::RegSequence, Type);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp745 SDNode *RegSequence = CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, DL, in SelectADD_SUB_I64() local
754 ReplaceNode(N, RegSequence); in SelectADD_SUB_I64()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenInstrInfo.inc6496 …{ 1801, 5, 1, 4, 579, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::RegSequence), 0x18a80ULL, nullptr, n…